2013-12-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59622
	* gimple-fold.c (gimple_fold_call): Don't replace OBJ_TYPE_REF
	call fndecl with 0 possible targets with BUILT_IN_UNREACHABLE,
	instead only for !inplace add a __builtin_unreachable () call
	before the call.

2013-12-31  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/avx512fintrin.h (_mm_add_round_sd): New.
	(_mm_add_round_sd): Ditto.
	(_mm_add_round_ss): Ditto.
	(_mm_sub_round_sd): Ditto.
	(_mm_sub_round_ss): Ditto.
	(_mm_rcp14_sd): Ditto.
	(_mm_rcp14_ss): Ditto.
	(_mm_sqrt_round_sd): Ditto.
	(_mm_sqrt_round_ss): Ditto.
	(_mm_mul_round_sd): Ditto.
	(_mm_mul_round_ss): Ditto.
	(_mm_div_round_sd): Ditto.
	(_mm_div_round_ss): Ditto.
	(_mm_scalef_round_sd): Ditto.
	(_mm_scalef_round_ss): Ditto.
	(_mm_scalef_round_sd): Ditto.
	(_mm_scalef_round_ss): Ditto.
	(_mm_cvt_roundsd_ss): Ditto.
	(_mm_cvt_roundsd_sd): Ditto.
	(_mm_getexp_round_ss): Ditto.
	(_mm_getexp_round_sd): Ditto.
	(_mm_getmant_round_sd): Ditto.
	(_mm_getmant_round_ss): Ditto.
	(_mm_roundscale_round_ss): Ditto.
	(_mm_roundscale_round_sd): Ditto.
	(_mm_max_round_sd): Ditto.
	(_mm_max_round_ss): Ditto.
	(_mm_min_round_sd): Ditto.
	(_mm_min_round_ss): Ditto.
	(_mm_fmadd_round_sd): Ditto.
	(_mm_fmadd_round_ss): Ditto.
	(_mm_fmsub_round_sd): Ditto.
	(_mm_fmsub_round_ss): Ditto.
	(_mm_fnmadd_round_sd): Ditto.
	(_mm_fnmadd_round_ss): Ditto.
	(_mm_fnmsub_round_sd): Ditto.
	(_mm_fnmsub_round_ss): Ditto.
	(_mm_scalef_sd): Ditto.
	(_mm_scalef_ss): Ditto.
	(_mm_getexp_ss): Ditto.
	(_mm_getexp_sd): Ditto.
	(_mm_getmant_sd): Ditto.
	(_mm_getmant_ss): Ditto.
	(_mm_roundscale_ss): Ditto.
	(_mm_roundscale_sd): Ditto.
	* config/i386/i386-builtin-types.def: New types to support
	new built-ins: <V2DF, V2DF, V2DF, INT, INT>,
	<V4SF, V4SF, V4SF, INT, INT>, <(V4SF, V4SF, V2DF, INT>,
	<V2DF, V2DF, V4SF, INT>, <V4SF, V4SF, V4SF, V4SF, IN>.
	* config/i386/i386.c (enum ix86_builtins): Add
	IX86_BUILTIN_ADDSD_ROUND, IX86_BUILTIN_ADDSS_ROUND,
	IX86_BUILTIN_CVTSD2SS_ROUND, IX86_BUILTIN_CVTSS2SD_ROUND,
	IX86_BUILTIN_DIVSD_ROUND, IX86_BUILTIN_GETEXPSD128,
	IX86_BUILTIN_DIVSS_ROUND, IX86_BUILTIN_GETEXPSS128,
	IX86_BUILTIN_GETMANTSD128, IX86_BUILTIN_GETMANTSS128,
	IX86_BUILTIN_MAXSD_ROUND, IX86_BUILTIN_MAXSS_ROUND,
	IX86_BUILTIN_MINSD_ROUND, IX86_BUILTIN_MINSS_ROUND,
	IX86_BUILTIN_MULSD_ROUND, IX86_BUILTIN_MULSS_ROUND,
	IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS, IX86_BUILTIN_RNDSCALESD,
	IX86_BUILTIN_RNDSCALESS, IX86_BUILTIN_RSQRT14SD,
	IX86_BUILTIN_RSQRT14SS, IX86_BUILTIN_SCALEFSD,
	IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SQRTSD_ROUND,
	IX86_BUILTIN_SQRTSS_ROUND, IX86_BUILTIN_SUBSD_ROUND,
	IX86_BUILTIN_SUBSS_ROUND, IX86_BUILTIN_VFMADDSD3_ROUND,
	IX86_BUILTIN_VFMADDSS3_ROUND, IX86_BUILTIN_VFMSUBSD3_MASK3,
	IX86_BUILTIN_VFMSUBSS3_MASK3.
	(builtin_description bdesc_args[]): Add
	__builtin_ia32_rcp14sd, __builtin_ia32_rcp14ss,
	__builtin_ia32_rsqrt14pd512_mask, __builtin_ia32_rsqrt14ps512_mask,
	__builtin_ia32_rsqrt14sd, __builtin_ia32_rsqrt14ss,
	__builtin_ia32_addsd_round, __builtin_ia32_addss_round,
	__builtin_ia32_cvtsd2ss_round, __builtin_ia32_cvtss2sd_round,
	__builtin_ia32_divsd_round, __builtin_ia32_divss_round,
	__builtin_ia32_getexpsd128_round, __builtin_ia32_getexpss128_round,
	__builtin_ia32_getmantsd_round, __builtin_ia32_getmantss_round,
	__builtin_ia32_maxsd_round, __builtin_ia32_maxss_round,
	__builtin_ia32_minsd_round, __builtin_ia32_minss_round,
	__builtin_ia32_mulsd_round, __builtin_ia32_mulss_round,
	__builtin_ia32_rndscalesd_round, __builtin_ia32_rndscaless_round,
	__builtin_ia32_scalefsd_round, __builtin_ia32_scalefss_round,
	__builtin_ia32_sqrtsd_round, __builtin_ia32_sqrtss_round,
	__builtin_ia32_subsd_round, __builtin_ia32_subss_round,
	__builtin_ia32_vfmaddsd3_round, __builtin_ia32_vfmaddss3_round.
	(ix86_expand_round_builtin): Expand new FTYPEs.
	* config/i386/sse.md (<sse>_vm<plusminus_insn><mode>3): Support
	EVEX's embedded rouding.
	(<sse>_vm<multdiv_mnemonic><mode>3): Ditto.
	(<sse>_vmsqrt<mode>2): Ditto.
	(<sse>_vm<code><mode>3): Ditto.
	(sse2_cvtsd2ss): Ditto.
	(sse2_cvtss2sd): Ditto.
	(*avx512f_vmscalef<mode>): Ditto.
	(avx512f_sgetexp<mode>): Ditto.
	(*avx512f_rndscale<mode>): Ditto.
	(avx512f_getmant<mode>): Ditto.
	(*srcp14<mode>): Make visible.
	(*rsqrt14<mode>): Ditto.
	* config/i386/subst.md (mask_mode512bit_condition): Fix
	mode calculation.
	(sd_mask_mode512bit_condition): Ditto.
	(round_mode512bit_condition): Ditto.
	(round_modev4sf_condition): Ditto.
	(round_mask_scalar_operand3): Remove.
	(round_prefix): New.
	(round_saeonly_op3): Ditto.
	(round_saeonly_prefix): Ditto.

2013-12-31  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New.
	(OPTION_MASK_ISA_SHA_UNSET): Ditto.
	(ix86_handle_option): Handle OPT_msha.
	* config.gcc (extra_headers): Add shaintrin.h.
	* config/i386/cpuid.h (bit_SHA): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA
	instructions.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	OPTION_MASK_ISA_SHA.
	* config/i386/i386.c (ix86_target_string): Add -msha.
	(ix86_option_override_internal): Add PTA_SHA.
	(ix86_valid_target_attribute_inner_p): Handle OPT_msha.
	(enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1,
	IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4,
	IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2,
	IX86_BUILTIN_SHA256RNDS2.
	(bdesc_args): Add BUILTINS defined above.
	(ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1,
	__builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte,
	__builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1,
	__builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2.
	(ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add
	warning for CODE_FOR_sha1rnds4.
	* config/i386/i386.h (TARGET_SHA): New.
	(TARGET_SHA_P): Ditto.
	* config/i386/i386.opt (-msha): Document it.
	* config/i386/immintrin.h: Add shaintrin.h.
	* config/i386/shaintrin.h: New.
	* config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2,
	UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1,
	UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2.
	(sha1msg1): New.
	(sha1msg2): Ditto.
	(sha1nexte): Ditto.
	(sha1rnds4): Ditto.
	(sha256msg1): Ditto.
	(sha256msg2): Ditto.
	(sha256rnds2): Ditto.
	* doc/invoke.texi: Add -msha.

2013-12-31  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h,
	avx512erintrin.h, avx512pfintrin.h.
	* config/i386/avx512cdintrin.h: New file.
	* config/i386/avx512erintrin.h: New file.
	* config/i386/avx512fintrin.h: New file.
	* config/i386/avx512pfintrin.h: New file.
	* config/i386/i386-builtin-types.def: Add V16UHI, V32SF, V16SF, V8DF,
	V8DI, V16SI, V64QI, PV8DF, PV8DI, PV16SI, PV16SF, PCV8DF, PCV16SF,
	PCV8DI, PCV16SI, V16QI_FTYPE_V16SI, V8DF_FTYPE_V8SI, V8DF_FTYPE_V8DF,
	V8HI_FTYPE_V8DI, V16SF_FTYPE_V16SF, V8SI_FTYPE_V8DI, V8SF_FTYPE_V8DF,
	V8SF_FTYPE_V8DF_V8SF_QI, V16HI_FTYPE_V16SI, V16SF_FTYPE_FLOAT,
	V16SI_FTYPE_INT, V8DF_FTYPE_DOUBLE, V8DI_FTYPE_INT64,
	V16SF_FTYPE_V4SF, V8DF_FTYPE_V4DF, V8DI_FTYPE_V4DI, V16QI_FTYPE_V8DI,
	UINT_FTYPE_V4SF, UINT64_FTYPE_V4SF, UINT_FTYPE_V2DF,
	UINT64_FTYPE_V2DF, V16SI_FTYPE_V16SI, V16SI_FTYPE_V16SI_V16SI_HI,
	V8DI_FTYPE_V8DI, V8DI_FTYPE_V8DI_V8DI_QI, V16SI_FTYPE_PV4SI,
	V16SF_FTYPE_PV4SF, V8DI_FTYPE_PV4DI, V8DF_FTYPE_PV4DF,
	V8UHI_FTYPE_V8UHI, V8USI_FTYPE_V8USI, V2DF_FTYPE_V2DF_UINT,
	V2DF_FTYPE_V2DF_UINT64, V4DF_FTYPE_V8DF_INT,
	V4DF_FTYPE_V8DF_INT_V4DF_QI, V8DF_FTYPE_V8DF_V8DI,
	V4SF_FTYPE_V4SF_UINT, V4SF_FTYPE_V4SF_UINT64,
	INT_FTYPE_V4SF_V4SF_INT_INT, INT_FTYPE_V2DF_V2DF_INT_INT,
	V16SF_FTYPE_V16SF_INT, V4SF_FTYPE_V16SF_INT,
	V4SF_FTYPE_V16SF_INT_V4SF_QI, V16SF_FTYPE_V16SF_V16SF,
	V16SF_FTYPE_V16SF_V16SI, V8DF_FTYPE_V8DF_V4DF_INT_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_INT_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT, V8DF_FTYPE_V8DF_V8DF,
	V16SF_FTYPE_V16SF_V16SF_INT, V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI,
	V16SF_FTYPE_V16SF_INT_V16SF_HI, V16SI_FTYPE_V16SI_V4SI_INT_V16SI_HI,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT,
	V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI,
	V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT,
	V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI,
	V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT, V16SF_FTYPE_V16SF_V4SF_INT,
	V16SF_FTYPE_V16SF_V4SF_INT_V16SF_HI, V16HI_FTYPE_V16SF_INT,
	V16HI_FTYPE_V16SF_INT_V16HI_HI, V16HI_FTYPE_V16HI_V16HI_INT_V16HI_HI,
	V16SI_FTYPE_V16SI_V4SI, V16SI_FTYPE_V16SI_V4SI_INT,
	V4SI_FTYPE_V16SI_INT, V4SI_FTYPE_V16SI_INT_V4SI_QI,
	V16SI_FTYPE_V16SI_V16SI, V16SI_FTYPE_V16SI_V16SI_INT_V16SI_HI,
	V16SI_FTYPE_V16SI_SI, V16SI_FTYPE_V16SI_INT,
	V16SI_FTYPE_V16SI_V4SI_V16SI_HI, V16SI_FTYPE_V16SI_INT_V16SI_HI,
	V8DI_FTYPE_V8DI_V8DI, V16SI_FTYPE_V8DF_V8DF,
	V8DI_FTYPE_V8DI_V8DI_INT_V8DI_QI, V8DI_FTYPE_V8DI_V4DI_INT_V8DI_QI,
	V8DI_FTYPE_V8DI_V2DI, V4DI_FTYPE_V8DI_INT,
	V4DI_FTYPE_V8DI_INT_V4DI_QI, V8DI_FTYPE_V8DI_V2DI_V8DI_QI,
	V8DI_FTYPE_V8DI_INT_V8DI_QI, VOID_FTYPE_PDOUBLE_V8DF,
	VOID_FTYPE_PFLOAT_V16SF, VOID_FTYPE_PV8DI_V8DI, HI_FTYPE_HI,
	HI_FTYPE_HI_HI, HI_FTYPE_HI_INT, QI_FTYPE_V8DI_V8DI,
	QI_FTYPE_V8DI_V8DI_QI, HI_FTYPE_V16SI_V16SI, HI_FTYPE_V16SI_V16SI_HI,
	QI_FTYPE_V8DI_V8DI_INT, QI_FTYPE_V8DI_V8DI_INT_QI,
	HI_FTYPE_V16SI_V16SI_INT, HI_FTYPE_V16SI_V16SI_INT ,HI,
	QI_FTYPE_V8DF_V8DF_INT, QI_FTYPE_V8DF_V8DF_INT_QI,
	QI_FTYPE_V8DF_V8DF_INT_QI_INT, HI_FTYPE_V16SF_V16SF_INT,
	HI_FTYPE_V16SF_V16SF_INT_HI, HI_FTYPE_V16SF_V16SF_INT_HI_INT,
	QI_FTYPE_V2DF_V2DF_INT, QI_FTYPE_V2DF_V2DF_INT_QI,
	QI_FTYPE_V2DF_V2DF_INT_QI_INT, QI_FTYPE_V4SF_V4SF_INT,
	QI_FTYPE_V4SF_V4SF_INT_QI, QI_FTYPE_V4SF_V4SF_INT_QI_INT,
	V16SI_FTYPE_HI, V8DI_FTYPE_QI, V8DF_FTYPE_V8DF_V8DF_V8DF,
	V16SF_FTYPE_V16SF_V16SF_V16SF, V8DF_FTYPE_V8DF_V8DF_QI,
	V8DF_FTYPE_V8SF_V8DF_QI, V8DF_FTYPE_V8SI_V8DF_QI,
	V8DI_FTYPE_V8SI_V8DI_QI, V8DI_FTYPE_V8HI_V8DI_QI,
	V8DI_FTYPE_V16QI_V8DI_QI, V8DI_FTYPE_V8DI_V8DI_V8DI_QI,
	V8DF_FTYPE_V8DI_V8DF_V8DF, V8DF_FTYPE_V8DI_V8DF_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DI_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_V8DF_QI,
	V16SI_FTYPE_V16SI_V16SI_V16SI_HI, V2DF_FTYPE_V2DF_V2DF_V2DF_QI,
	V2DF_FTYPE_V2DF_V4SF_V2DF_QI, V16SF_FTYPE_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SI_V16SF_HI, V16SF_FTYPE_V16SF_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SI_V16SF_V16SF, V16SF_FTYPE_V16SI_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SF_V16SI_V16SF_HI, V4SF_FTYPE_V4SF_V2DF_V4SF_QI,
	V4SF_FTYPE_V4SF_V4SF_V4SF_QI, V16SF_FTYPE_V4SF_V16SF_HI,
	V8DF_FTYPE_V4DF_V8DF_QI, V8DF_FTYPE_V2DF_V8DF_QI,
	V16SI_FTYPE_V4SI_V16SI_HI, V16SI_FTYPE_SI_V16SI_HI,
	V16SI_FTYPE_V16HI_V16SI_HI, V16SI_FTYPE_V16QI_V16SI_HI,
	V8SI_FTYPE_V8DF_V8SI_QI, V8DI_FTYPE_V4DI_V8DI_QI,
	V8DI_FTYPE_V2DI_V8DI_QI, V8DI_FTYPE_DI_V8DI_QI,
	V16SF_FTYPE_PCV16SF_V16SF_HI, V8DF_FTYPE_PCV8DF_V8DF_QI,
	V16SI_FTYPE_PCV16SI_V16SI_HI, V8DI_FTYPE_PCV8DI_V8DI_QI,
	V2DF_FTYPE_PCDOUBLE_V2DF_QI, V4SF_FTYPE_PCFLOAT_V4SF_QI,
	V16QI_FTYPE_V16SI_V16QI_HI, V16HI_FTYPE_V16SI_V16HI_HI,
	V8SI_FTYPE_V8DI_V8SI_QI, V8HI_FTYPE_V8DI_V8HI_QI,
	V16QI_FTYPE_V8DI_V16QI_QI, VOID_FTYPE_PV8DF_V8DF_QI,
	VOID_FTYPE_PV16SF_V16SF_HI, VOID_FTYPE_PV8DI_V8DI_QI,
	VOID_FTYPE_PV16SI_V16SI_HI, VOID_FTYPE_PDOUBLE_V2DF_QI,
	VOID_FTYPE_PFLOAT_V4SF_QI, V16SI_FTYPE_V16SF_V16SI_HI,
	V8DI_FTYPE_V8DI_V8DI_V8DI_INT_QI,
	V16SI_FTYPE_V16SI_V16SI_V16SI_INT_HI, V8DI_FTYPE_V8DI_V8DI_V8DI,
	V16SI_FTYPE_V16SI_V16SI_V16SI, V8DF_FTYPE_V8DF_V8DI_V8DF,
	V16SF_FTYPE_V16SF_V16SI_V16SF, V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI,
	V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI, V8DI_FTYPE_V16SI_V16SI_V8DI_QI,
	UINT64_FTYPE_V2DF_INT, UINT64_FTYPE_V4SF_INT, UINT_FTYPE_V2DF_INT,
	UINT_FTYPE_V4SF_INT, INT64_FTYPE_V2DF_INT, INT64_FTYPE_V4SF_INT,
	INT_FTYPE_V2DF_INT, INT_FTYPE_V4SF_INT, V2DF_FTYPE_V2DF_UINT64_INT,
	V4SF_FTYPE_V4SF_UINT64_INT, V4SF_FTYPE_V4SF_UINT_INT,
	V2DF_FTYPE_V2DF_INT64_INT, V4SF_FTYPE_V4SF_INT64_INT,
	V4SF_FTYPE_V4SF_INT_INT, V16SI_FTYPE_V16SF_V16SI_HI_INT,
	V16SF_FTYPE_V16SI_V16SF_HI_INT, V16SF_FTYPE_V16SF_V16SF_HI_INT,
	V16SF_FTYPE_V16HI_V16SF_HI_INT, V8SI_FTYPE_V8DF_V8SI_QI_INT,
	V8SF_FTYPE_V8DF_V8SF_QI_INT, V8DF_FTYPE_V8DF_V8DF_QI_INT,
	V8DF_FTYPE_V8SF_V8DF_QI_INT, V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT,
	V8DF_FTYPE_V8DF_V8DF_V8DF_QI_INT, V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT,
	V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT,
	V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_INT,
	V16SF_FTYPE_V16SF_INT_V16SF_HI_INT, V8DF_FTYPE_V8DF_INT_V8DF_QI_INT,
	V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT,
	V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT, V8DI_FTYPE_V8DI_SI_V8DI_V8DI,
	V16SF_FTYPE_V16SF_PCFLOAT_V16SI_HI_INT,
	V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V8SI_QI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
	V8SF_FTYPE_V8SF_PCFLOAT_V8DI_QI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V8DI_QI_INT,
	V16SI_FTYPE_V16SI_PCINT_V16SI_HI_INT,
	V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V8SI_QI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
	V8SI_FTYPE_V8SI_PCINT_V8DI_QI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V8DI_QI_INT,
	VOID_FTYPE_PFLOAT_HI_V16SI_V16SF_INT,
	VOID_FTYPE_PDOUBLE_QI_V8SI_V8DF_INT,
	VOID_FTYPE_PFLOAT_QI_V8DI_V8SF_INT,
	VOID_FTYPE_PDOUBLE_QI_V8DI_V8DF_INT,
	VOID_FTYPE_PINT_HI_V16SI_V16SI_INT,
	VOID_FTYPE_PLONGLONG_QI_V8SI_V8DI_INT,
	VOID_FTYPE_PINT_QI_V8DI_V8SI_INT,
	VOID_FTYPE_PLONGLONG_QI_V8DI_V8DI_INT,
	VOID_FTYPE_HI_V16SI_PCINT_INT_INT, VOID_FTYPE_QI_V8DI_PCINT_INT_INT.
	(ALIAS): Add DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V8DF_V8DF, ROUND).
	* config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_ADDPD512,
	IX86_BUILTIN_ADDPS512, IX86_BUILTIN_ADDSD_MASK,
	IX86_BUILTIN_ADDSS_MASK, IX86_BUILTIN_ALIGND512,
	IX86_BUILTIN_ALIGNQ512, IX86_BUILTIN_BLENDMD512,
	IX86_BUILTIN_BLENDMPD512, IX86_BUILTIN_BLENDMPS512,
	IX86_BUILTIN_BLENDMQ512, IX86_BUILTIN_BROADCASTF32X4_512,
	IX86_BUILTIN_BROADCASTF64X4_512, IX86_BUILTIN_BROADCASTI32X4_512,
	IX86_BUILTIN_BROADCASTI64X4_512, IX86_BUILTIN_BROADCASTSD512,
	IX86_BUILTIN_BROADCASTSS512, IX86_BUILTIN_CMPD512,
	IX86_BUILTIN_CMPPD512, IX86_BUILTIN_CMPPS512, IX86_BUILTIN_CMPQ512,
	IX86_BUILTIN_CMPSD_MASK, IX86_BUILTIN_CMPSS_MASK, IX86_BUILTIN_COMIDF,
	IX86_BUILTIN_COMISF, IX86_BUILTIN_COMPRESSPD512,
	IX86_BUILTIN_COMPRESSPDSTORE512, IX86_BUILTIN_COMPRESSPS512,
	IX86_BUILTIN_COMPRESSPSSTORE512, IX86_BUILTIN_CVTDQ2PD512,
	IX86_BUILTIN_CVTDQ2PS512, IX86_BUILTIN_CVTPD2DQ512,
	IX86_BUILTIN_CVTPD2PS512, IX86_BUILTIN_CVTPD2UDQ512,
	IX86_BUILTIN_CVTPH2PS512, IX86_BUILTIN_CVTPS2DQ512,
	IX86_BUILTIN_CVTPS2PD512, IX86_BUILTIN_CVTPS2PH512,
	IX86_BUILTIN_CVTPS2UDQ512, IX86_BUILTIN_CVTSD2SS_MASK,
	IX86_BUILTIN_CVTSI2SD64, IX86_BUILTIN_CVTSI2SS32,
	IX86_BUILTIN_CVTSI2SS64, IX86_BUILTIN_CVTSS2SD_MASK,
	IX86_BUILTIN_CVTTPD2DQ512, IX86_BUILTIN_CVTTPD2UDQ512,
	IX86_BUILTIN_CVTTPS2DQ512, IX86_BUILTIN_CVTTPS2UDQ512,
	IX86_BUILTIN_CVTUDQ2PD512, IX86_BUILTIN_CVTUDQ2PS512,
	IX86_BUILTIN_CVTUSI2SD32, IX86_BUILTIN_CVTUSI2SD64,
	IX86_BUILTIN_CVTUSI2SS32, IX86_BUILTIN_CVTUSI2SS64,
	IX86_BUILTIN_DIVPD512, IX86_BUILTIN_DIVPS512, IX86_BUILTIN_DIVSD_MASK,
	IX86_BUILTIN_DIVSS_MASK, IX86_BUILTIN_EXPANDPD512,
	IX86_BUILTIN_EXPANDPD512Z, IX86_BUILTIN_EXPANDPDLOAD512,
	IX86_BUILTIN_EXPANDPDLOAD512Z, IX86_BUILTIN_EXPANDPS512,
	IX86_BUILTIN_EXPANDPS512Z, IX86_BUILTIN_EXPANDPSLOAD512,
	IX86_BUILTIN_EXPANDPSLOAD512Z, IX86_BUILTIN_EXTRACTF32X4,
	IX86_BUILTIN_EXTRACTF64X4, IX86_BUILTIN_EXTRACTI32X4,
	IX86_BUILTIN_EXTRACTI64X4, IX86_BUILTIN_FIXUPIMMPD512_MASK,
	IX86_BUILTIN_FIXUPIMMPD512_MASKZ, IX86_BUILTIN_FIXUPIMMPS512_MASK,
	IX86_BUILTIN_FIXUPIMMPS512_MASKZ, IX86_BUILTIN_FIXUPIMMSD128_MASK,
	IX86_BUILTIN_FIXUPIMMSD128_MASKZ, IX86_BUILTIN_FIXUPIMMSS128_MASK,
	IX86_BUILTIN_FIXUPIMMSS128_MASKZ, IX86_BUILTIN_GETEXPPD512,
	IX86_BUILTIN_GETEXPPS512, IX86_BUILTIN_GETEXPSD128,
	IX86_BUILTIN_GETEXPSS128, IX86_BUILTIN_GETMANTPD512,
	IX86_BUILTIN_GETMANTPS512, IX86_BUILTIN_GETMANTSD128,
	IX86_BUILTIN_GETMANTSS128, IX86_BUILTIN_INSERTF32X4,
	IX86_BUILTIN_INSERTF64X4, IX86_BUILTIN_INSERTI32X4,
	IX86_BUILTIN_INSERTI64X4, IX86_BUILTIN_LOADAPD512,
	IX86_BUILTIN_LOADAPS512, IX86_BUILTIN_LOADDQUDI512,
	IX86_BUILTIN_LOADDQUSI512, IX86_BUILTIN_LOADSD, IX86_BUILTIN_LOADSS,
	IX86_BUILTIN_LOADUPD512, IX86_BUILTIN_LOADUPS512,
	IX86_BUILTIN_MAXPD512, IX86_BUILTIN_MAXPS512, IX86_BUILTIN_MAXSD_MASK,
	IX86_BUILTIN_MAXSS_MASK, IX86_BUILTIN_MINPD512, IX86_BUILTIN_MINPS512,
	IX86_BUILTIN_MINSD_MASK, IX86_BUILTIN_MINSS_MASK,
	IX86_BUILTIN_MOVAPD512, IX86_BUILTIN_MOVAPS512,
	IX86_BUILTIN_MOVDDUP512, IX86_BUILTIN_MOVDQA32LOAD512,
	IX86_BUILTIN_MOVDQA32STORE512, IX86_BUILTIN_MOVDQA32_512,
	IX86_BUILTIN_MOVDQA64LOAD512, IX86_BUILTIN_MOVDQA64STORE512,
	IX86_BUILTIN_MOVDQA64_512, IX86_BUILTIN_MOVESD, IX86_BUILTIN_MOVESS,
	IX86_BUILTIN_MOVNTDQ512, IX86_BUILTIN_MOVNTPD512,
	IX86_BUILTIN_MOVNTPS512, IX86_BUILTIN_MOVSHDUP512,
	IX86_BUILTIN_MOVSLDUP512, IX86_BUILTIN_MULPD512,
	IX86_BUILTIN_MULPS512, IX86_BUILTIN_MULSD_MASK,
	IX86_BUILTIN_MULSS_MASK, IX86_BUILTIN_PABSD512, IX86_BUILTIN_PABSQ512,
	IX86_BUILTIN_PADDD512, IX86_BUILTIN_PADDQ512, IX86_BUILTIN_PANDD512,
	IX86_BUILTIN_PANDND512, IX86_BUILTIN_PANDNQ512, IX86_BUILTIN_PANDQ512,
	IX86_BUILTIN_PBROADCASTD512, IX86_BUILTIN_PBROADCASTD512_GPR,
	IX86_BUILTIN_PBROADCASTMB512, IX86_BUILTIN_PBROADCASTMW512,
	IX86_BUILTIN_PBROADCASTQ512, IX86_BUILTIN_PBROADCASTQ512_GPR,
	IX86_BUILTIN_PBROADCASTQ512_MEM, IX86_BUILTIN_PCMPEQD512_MASK,
	IX86_BUILTIN_PCMPEQQ512_MASK, IX86_BUILTIN_PCMPGTD512_MASK,
	IX86_BUILTIN_PCMPGTQ512_MASK, IX86_BUILTIN_PCOMPRESSD512,
	IX86_BUILTIN_PCOMPRESSDSTORE512, IX86_BUILTIN_PCOMPRESSQ512,
	IX86_BUILTIN_PCOMPRESSQSTORE512, IX86_BUILTIN_PEXPANDD512,
	IX86_BUILTIN_PEXPANDD512Z, IX86_BUILTIN_PEXPANDDLOAD512,
	IX86_BUILTIN_PEXPANDDLOAD512Z, IX86_BUILTIN_PEXPANDQ512,
	IX86_BUILTIN_PEXPANDQ512Z, IX86_BUILTIN_PEXPANDQLOAD512,
	IX86_BUILTIN_PEXPANDQLOAD512Z, IX86_BUILTIN_PMAXSD512,
	IX86_BUILTIN_PMAXSQ512, IX86_BUILTIN_PMAXUD512,
	IX86_BUILTIN_PMAXUQ512, IX86_BUILTIN_PMINSD512,
	IX86_BUILTIN_PMINSQ512, IX86_BUILTIN_PMINUD512,
	IX86_BUILTIN_PMINUQ512, IX86_BUILTIN_PMOVDB512,
	IX86_BUILTIN_PMOVDW512, IX86_BUILTIN_PMOVQB512,
	IX86_BUILTIN_PMOVQD512, IX86_BUILTIN_PMOVQW512,
	IX86_BUILTIN_PMOVSDB512, IX86_BUILTIN_PMOVSDW512,
	IX86_BUILTIN_PMOVSQB512, IX86_BUILTIN_PMOVSQD512,
	IX86_BUILTIN_PMOVSQW512, IX86_BUILTIN_PMOVSXBD512,
	IX86_BUILTIN_PMOVSXBQ512, IX86_BUILTIN_PMOVSXDQ512,
	IX86_BUILTIN_PMOVSXWD512, IX86_BUILTIN_PMOVSXWQ512,
	IX86_BUILTIN_PMOVUSDB512, IX86_BUILTIN_PMOVUSDW512,
	IX86_BUILTIN_PMOVUSQB512, IX86_BUILTIN_PMOVUSQD512,
	IX86_BUILTIN_PMOVUSQW512, IX86_BUILTIN_PMOVZXBD512,
	IX86_BUILTIN_PMOVZXBQ512, IX86_BUILTIN_PMOVZXDQ512,
	IX86_BUILTIN_PMOVZXWD512, IX86_BUILTIN_PMOVZXWQ512,
	IX86_BUILTIN_PMULDQ512, IX86_BUILTIN_PMULLD512,
	IX86_BUILTIN_PMULUDQ512, IX86_BUILTIN_PORD512, IX86_BUILTIN_PORQ512,
	IX86_BUILTIN_PROLD512, IX86_BUILTIN_PROLQ512, IX86_BUILTIN_PROLVD512,
	IX86_BUILTIN_PROLVQ512, IX86_BUILTIN_PRORD512, IX86_BUILTIN_PRORQ512,
	IX86_BUILTIN_PRORVD512, IX86_BUILTIN_PRORVQ512,
	IX86_BUILTIN_PSHUFD512, IX86_BUILTIN_PSLLD512, IX86_BUILTIN_PSLLDI512,
	IX86_BUILTIN_PSLLQ512, IX86_BUILTIN_PSLLQI512,
	IX86_BUILTIN_PSLLVV16SI, IX86_BUILTIN_PSLLVV8DI,
	IX86_BUILTIN_PSRAD512, IX86_BUILTIN_PSRADI512, IX86_BUILTIN_PSRAQ512,
	IX86_BUILTIN_PSRAQI512, IX86_BUILTIN_PSRAVV16SI,
	IX86_BUILTIN_PSRAVV8DI, IX86_BUILTIN_PSRLD512, IX86_BUILTIN_PSRLDI512,
	IX86_BUILTIN_PSRLQ512, IX86_BUILTIN_PSRLQI512,
	IX86_BUILTIN_PSRLVV16SI, IX86_BUILTIN_PSRLVV8DI,
	IX86_BUILTIN_PSUBD512, IX86_BUILTIN_PSUBQ512, IX86_BUILTIN_PTESTMD512,
	IX86_BUILTIN_PTESTMQ512, IX86_BUILTIN_PTESTNMD512,
	IX86_BUILTIN_PTESTNMQ512, IX86_BUILTIN_PUNPCKHDQ512,
	IX86_BUILTIN_PUNPCKHQDQ512, IX86_BUILTIN_PUNPCKLDQ512,
	IX86_BUILTIN_PUNPCKLQDQ512, IX86_BUILTIN_PXORD512,
	IX86_BUILTIN_PXORQ512, IX86_BUILTIN_RCP14PD512,
	IX86_BUILTIN_RCP14PS512, IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS,
	IX86_BUILTIN_RNDSCALEPD, IX86_BUILTIN_RNDSCALEPS,
	IX86_BUILTIN_RNDSCALESD, IX86_BUILTIN_RNDSCALESS,
	IX86_BUILTIN_RSQRT14PD512, IX86_BUILTIN_RSQRT14PS512,
	IX86_BUILTIN_RSQRT14SD, IX86_BUILTIN_RSQRT14SS,
	IX86_BUILTIN_SCALEFPD512, IX86_BUILTIN_SCALEFPS512,
	IX86_BUILTIN_SCALEFSD, IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SHUFPD512,
	IX86_BUILTIN_SHUFPS512, IX86_BUILTIN_SHUF_F32x4,
	IX86_BUILTIN_SHUF_F64x2, IX86_BUILTIN_SHUF_I32x4,
	IX86_BUILTIN_SHUF_I64x2,
	IX86_BUILTIN_SQRTPD512_MASK, IX86_BUILTIN_SQRTPS512_MASK,
	IX86_BUILTIN_SQRTSD_MASK,
	IX86_BUILTIN_SQRTSS_MASK, IX86_BUILTIN_STOREAPD512,
	IX86_BUILTIN_STOREAPS512, IX86_BUILTIN_STOREDQUDI512,
	IX86_BUILTIN_STOREDQUSI512, IX86_BUILTIN_STORESD,
	IX86_BUILTIN_STORESS, IX86_BUILTIN_STOREUPD512,
	IX86_BUILTIN_STOREUPS512, IX86_BUILTIN_SUBPD512,
	IX86_BUILTIN_SUBPS512, IX86_BUILTIN_SUBSD_MASK,
	IX86_BUILTIN_SUBSS_MASK, IX86_BUILTIN_UCMPD512, IX86_BUILTIN_UCMPQ512,
	IX86_BUILTIN_UNPCKHPD512, IX86_BUILTIN_UNPCKHPS512,
	IX86_BUILTIN_UNPCKLPD512, IX86_BUILTIN_UNPCKLPS512,
	IX86_BUILTIN_VCVTSD2SI32, IX86_BUILTIN_VCVTSD2SI64,
	IX86_BUILTIN_VCVTSD2USI32, IX86_BUILTIN_VCVTSD2USI64,
	IX86_BUILTIN_VCVTSS2SI32, IX86_BUILTIN_VCVTSS2SI64,
	IX86_BUILTIN_VCVTSS2USI32, IX86_BUILTIN_VCVTSS2USI64,
	IX86_BUILTIN_VCVTTSD2SI32, IX86_BUILTIN_VCVTTSD2SI64,
	IX86_BUILTIN_VCVTTSD2USI32, IX86_BUILTIN_VCVTTSD2USI64,
	IX86_BUILTIN_VCVTTSS2SI32, IX86_BUILTIN_VCVTTSS2SI64,
	IX86_BUILTIN_VCVTTSS2USI32, IX86_BUILTIN_VCVTTSS2USI64,
	IX86_BUILTIN_VFMADDPD512_MASK, IX86_BUILTIN_VFMADDPD512_MASK3,
	IX86_BUILTIN_VFMADDPD512_MASKZ, IX86_BUILTIN_VFMADDPS512_MASK,
	IX86_BUILTIN_VFMADDPS512_MASK3, IX86_BUILTIN_VFMADDPS512_MASKZ,
	IX86_BUILTIN_VFMADDSD3_MASK, IX86_BUILTIN_VFMADDSD3_MASK3,
	IX86_BUILTIN_VFMADDSD3_MASKZ, IX86_BUILTIN_VFMADDSS3_MASK,
	IX86_BUILTIN_VFMADDSS3_MASK3, IX86_BUILTIN_VFMADDSS3_MASKZ,
	IX86_BUILTIN_VFMADDSUBPD512_MASK, IX86_BUILTIN_VFMADDSUBPD512_MASK3,
	IX86_BUILTIN_VFMADDSUBPD512_MASKZ, IX86_BUILTIN_VFMADDSUBPS512_MASK,
	IX86_BUILTIN_VFMADDSUBPS512_MASK3, IX86_BUILTIN_VFMADDSUBPS512_MASKZ,
	IX86_BUILTIN_VFMSUBADDPD512_MASK3, IX86_BUILTIN_VFMSUBADDPS512_MASK3,
	IX86_BUILTIN_VFMSUBPD512_MASK3, IX86_BUILTIN_VFMSUBPS512_MASK3,
	IX86_BUILTIN_VFMSUBSD3_MASK3, IX86_BUILTIN_VFMSUBSS3_MASK3,
	IX86_BUILTIN_VFNMADDPD512_MASK, IX86_BUILTIN_VFNMADDPS512_MASK,
	IX86_BUILTIN_VFNMSUBPD512_MASK, IX86_BUILTIN_VFNMSUBPD512_MASK3,
	IX86_BUILTIN_VFNMSUBPS512_MASK, IX86_BUILTIN_VFNMSUBPS512_MASK3,
	IX86_BUILTIN_VPCLZCNTD512, IX86_BUILTIN_VPCLZCNTQ512,
	IX86_BUILTIN_VPCONFLICTD512, IX86_BUILTIN_VPCONFLICTQ512,
	IX86_BUILTIN_VPERMDF512, IX86_BUILTIN_VPERMDI512,
	IX86_BUILTIN_VPERMI2VARD512, IX86_BUILTIN_VPERMI2VARPD512,
	IX86_BUILTIN_VPERMI2VARPS512, IX86_BUILTIN_VPERMI2VARQ512,
	IX86_BUILTIN_VPERMILPD512, IX86_BUILTIN_VPERMILPS512,
	IX86_BUILTIN_VPERMILVARPD512, IX86_BUILTIN_VPERMILVARPS512,
	IX86_BUILTIN_VPERMT2VARD512, IX86_BUILTIN_VPERMT2VARD512_MASKZ,
	IX86_BUILTIN_VPERMT2VARPD512, IX86_BUILTIN_VPERMT2VARPD512_MASKZ,
	IX86_BUILTIN_VPERMT2VARPS512, IX86_BUILTIN_VPERMT2VARPS512_MASKZ,
	IX86_BUILTIN_VPERMT2VARQ512, IX86_BUILTIN_VPERMT2VARQ512_MASKZ,
	IX86_BUILTIN_VPERMVARDF512, IX86_BUILTIN_VPERMVARDI512,
	IX86_BUILTIN_VPERMVARSF512, IX86_BUILTIN_VPERMVARSI512,
	IX86_BUILTIN_VTERNLOGD512_MASK, IX86_BUILTIN_VTERNLOGD512_MASKZ,
	IX86_BUILTIN_VTERNLOGQ512_MASK, IX86_BUILTIN_VTERNLOGQ512_MASKZ,
	IX86_BUILTIN_KAND16, IX86_BUILTIN_KANDN16, IX86_BUILTIN_KNOT16,
	IX86_BUILTIN_KOR16, IX86_BUILTIN_KORTESTC16, IX86_BUILTIN_KORTESTZ16,
	IX86_BUILTIN_KUNPCKBW, IX86_BUILTIN_KXNOR16, IX86_BUILTIN_KXOR16,
	IX86_BUILTIN_GATHER3SIV8DI,
	IX86_BUILTIN_SCATTERDIV16SF, IX86_BUILTIN_SCATTERDIV16SI,
	IX86_BUILTIN_SCATTERDIV8DF, IX86_BUILTIN_SCATTERDIV8DI,
	IX86_BUILTIN_SCATTERSIV16SF, IX86_BUILTIN_SCATTERSIV16SI,
	IX86_BUILTIN_SCATTERSIV8DF, IX86_BUILTIN_SCATTERSIV8DI,
	IX86_BUILTIN_GATHERPFDPS, IX86_BUILTIN_GATHERPFQPS,
	IX86_BUILTIN_SCATTERPFDPS, IX86_BUILTIN_SCATTERPFQPS,
	IX86_BUILTIN_EXP2PD_MASK, IX86_BUILTIN_EXP2PS_MASK,
	IX86_BUILTIN_RCP28PD, IX86_BUILTIN_RCP28PS,
	IX86_BUILTIN_RSQRT28PD, IX86_BUILTIN_RSQRT28PS.
	(bdesc_special_args): Add __builtin_ia32_compressstoresf512_mask,
	__builtin_ia32_compressstoresi512_mask,
	__builtin_ia32_compressstoredf512_mask,
	__builtin_ia32_compressstoredi512_mask,
	__builtin_ia32_expandloadsf512_mask,
	__builtin_ia32_expandloadsf512_maskz,
	__builtin_ia32_expandloadsi512_mask,
	__builtin_ia32_expandloadsi512_maskz,
	__builtin_ia32_expandloaddf512_mask,
	__builtin_ia32_expandloaddf512_maskz,
	__builtin_ia32_expandloaddi512_mask,
	__builtin_ia32_expandloaddi512_maskz,
	__builtin_ia32_loaddqusi512_mask, __builtin_ia32_loaddqudi512_mask,
	__builtin_ia32_loadsd_mask, __builtin_ia32_loadss_mask,
	__builtin_ia32_loadupd512_mask, __builtin_ia32_loadups512_mask,
	__builtin_ia32_loadaps512_mask, __builtin_ia32_movdqa32load512_mask,
	__builtin_ia32_loadapd512_mask, __builtin_ia32_movdqa64load512_mask,
	__builtin_ia32_movntps512, __builtin_ia32_movntpd512,
	__builtin_ia32_movntdq512, __builtin_ia32_storedqusi512_mask,
	__builtin_ia32_storedqudi512_mask, __builtin_ia32_storesd_mask,
	__builtin_ia32_storess_mask, __builtin_ia32_storeupd512_mask,
	__builtin_ia32_storeups512_mask, __builtin_ia32_storeaps512_mask,
	__builtin_ia32_movdqa32store512_mask, __builtin_ia32_storeapd512_mask,
	__builtin_ia32_movdqa64store512_mask, __builtin_ia32_alignd512_mask,
	__builtin_ia32_alignq512_mask, __builtin_ia32_blendmd_512_mask,
	__builtin_ia32_blendmpd_512_mask, __builtin_ia32_blendmps_512_mask,
	__builtin_ia32_blendmq_512_mask, __builtin_ia32_broadcastf32x4_512,
	__builtin_ia32_broadcastf64x4_512, __builtin_ia32_broadcasti32x4_512,
	__builtin_ia32_broadcasti64x4_512, __builtin_ia32_broadcastsd512,
	__builtin_ia32_broadcastss512, __builtin_ia32_cmpd512_mask,
	__builtin_ia32_cmpq512_mask, __builtin_ia32_compressdf512_mask,
	__builtin_ia32_compresssf512_mask, __builtin_ia32_cvtdq2pd512_mask,
	__builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_cvtudq2pd512_mask,
	__builtin_ia32_cvtusi2sd32, __builtin_ia32_expanddf512_mask,
	__builtin_ia32_expanddf512_maskz, __builtin_ia32_expandsf512_mask,
	__builtin_ia32_expandsf512_maskz, __builtin_ia32_extractf32x4_mask,
	__builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask,
	__builtin_ia32_extracti64x4_mask, __builtin_ia32_insertf32x4_mask,
	__builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask,
	__builtin_ia32_inserti64x4_mask, __builtin_ia32_movapd512_mask,
	__builtin_ia32_movaps512_mask, __builtin_ia32_movddup512_mask,
	__builtin_ia32_movdqa32_512_mask, __builtin_ia32_movdqa64_512_mask,
	__builtin_ia32_movesd_mask, __builtin_ia32_movess_mask,
	__builtin_ia32_movshdup512_mask, __builtin_ia32_movsldup512_mask,
	__builtin_ia32_pabsd512_mask, __builtin_ia32_pabsq512_mask,
	__builtin_ia32_paddd512_mask, __builtin_ia32_paddq512_mask,
	__builtin_ia32_pandd512_mask, __builtin_ia32_pandnd512_mask,
	__builtin_ia32_pandnq512_mask, __builtin_ia32_pandq512_mask,
	__builtin_ia32_pbroadcastd512, __builtin_ia32_pbroadcastd512_gpr_mask,
	__builtin_ia32_broadcastmb512, __builtin_ia32_broadcastmw512,
	__builtin_ia32_pbroadcastq512, __builtin_ia32_pbroadcastq512_gpr_mask,
	__builtin_ia32_pbroadcastq512_mem_mask,
	__builtin_ia32_pcmpeqd512_mask, __builtin_ia32_pcmpeqq512_mask,
	__builtin_ia32_pcmpgtd512_mask, __builtin_ia32_pcmpgtq512_mask,
	__builtin_ia32_compresssi512_mask, __builtin_ia32_compressdi512_mask,
	__builtin_ia32_expandsi512_mask, __builtin_ia32_expandsi512_maskz,
	__builtin_ia32_expanddi512_mask, __builtin_ia32_expanddi512_maskz,
	__builtin_ia32_pmaxsd512_mask, __builtin_ia32_pmaxsq512_mask,
	__builtin_ia32_pmaxud512_mask, __builtin_ia32_pmaxuq512_mask,
	__builtin_ia32_pminsd512_mask, __builtin_ia32_pminsq512_mask,
	__builtin_ia32_pminud512_mask, __builtin_ia32_pminuq512_mask,
	__builtin_ia32_pmovdb512_mask, __builtin_ia32_pmovdw512_mask,
	__builtin_ia32_pmovqb512_mask, __builtin_ia32_pmovqd512_mask,
	__builtin_ia32_pmovqw512_mask, __builtin_ia32_pmovsdb512_mask,
	__builtin_ia32_pmovsdw512_mask, __builtin_ia32_pmovsqb512_mask,
	__builtin_ia32_pmovsqd512_mask, __builtin_ia32_pmovsqw512_mask,
	__builtin_ia32_pmovsxbd512_mask, __builtin_ia32_pmovsxbq512_mask,
	__builtin_ia32_pmovsxdq512_mask, __builtin_ia32_pmovsxwd512_mask,
	__builtin_ia32_pmovsxwq512_mask, __builtin_ia32_pmovusdb512_mask,
	__builtin_ia32_pmovusdw512_mask, __builtin_ia32_pmovusqb512_mask,
	__builtin_ia32_pmovusqd512_mask, __builtin_ia32_pmovusqw512_mask,
	__builtin_ia32_pmovzxbd512_mask, __builtin_ia32_pmovzxbq512_mask,
	__builtin_ia32_pmovzxdq512_mask, __builtin_ia32_pmovzxwd512_mask,
	__builtin_ia32_pmovzxwq512_mask, __builtin_ia32_pmuldq512_mask,
	__builtin_ia32_pmulld512_mask, __builtin_ia32_pmuludq512_mask,
	__builtin_ia32_pord512_mask, __builtin_ia32_porq512_mask,
	__builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask,
	__builtin_ia32_prolvd512_mask, __builtin_ia32_prolvq512_mask,
	__builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask,
	__builtin_ia32_prorvd512_mask, __builtin_ia32_prorvq512_mask,
	__builtin_ia32_pshufd512_mask, __builtin_ia32_pslld512_mask,
	__builtin_ia32_pslldi512_mask, __builtin_ia32_psllq512_mask,
	__builtin_ia32_psllqi512_mask, __builtin_ia32_psllv16si_mask,
	__builtin_ia32_psllv8di_mask, __builtin_ia32_psrad512_mask,
	__builtin_ia32_psradi512_mask, __builtin_ia32_psraq512_mask,
	__builtin_ia32_psraqi512_mask, __builtin_ia32_psrav16si_mask,
	__builtin_ia32_psrav8di_mask, __builtin_ia32_psrld512_mask,
	__builtin_ia32_psrldi512_mask, __builtin_ia32_psrlq512_mask,
	__builtin_ia32_psrlqi512_mask, __builtin_ia32_psrlv16si_mask,
	__builtin_ia32_psrlv8di_mask, __builtin_ia32_psubd512_mask,
	__builtin_ia32_psubq512_mask, __builtin_ia32_ptestmd512,
	__builtin_ia32_ptestmq512, __builtin_ia32_ptestnmd512,
	__builtin_ia32_ptestnmq512, __builtin_ia32_punpckhdq512_mask,
	__builtin_ia32_punpckhqdq512_mask, __builtin_ia32_punpckldq512_mask,
	__builtin_ia32_punpcklqdq512_mask, __builtin_ia32_pxord512_mask,
	__builtin_ia32_pxorq512_mask, __builtin_ia32_rcp14pd512_mask,
	__builtin_ia32_rcp14ps512_mask, __builtin_ia32_rcp14sd_mask,
	__builtin_ia32_rcp14ss_mask, __builtin_ia32_rsqrt14pd512_mask,
	__builtin_ia32_rsqrt14ps512_mask, __builtin_ia32_rsqrt14sd_mask,
	__builtin_ia32_rsqrt14ss_mask, __builtin_ia32_shufpd512_mask,
	__builtin_ia32_shufps512_mask, __builtin_ia32_shuf_f32x4_mask,
	__builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask,
	__builtin_ia32_shuf_i64x2_mask, __builtin_ia32_ucmpd512_mask,
	__builtin_ia32_ucmpq512_mask, __builtin_ia32_unpckhpd512_mask,
	__builtin_ia32_unpckhps512_mask, __builtin_ia32_unpcklpd512_mask,
	__builtin_ia32_unpcklps512_mask, __builtin_ia32_vplzcntd_512_mask,
	__builtin_ia32_vplzcntq_512_mask,
	__builtin_ia32_vpconflictsi_512_mask,
	__builtin_ia32_vpconflictdi_512_mask, __builtin_ia32_permdf512_mask,
	__builtin_ia32_permdi512_mask, __builtin_ia32_vpermi2vard512_mask,
	__builtin_ia32_vpermi2varpd512_mask,
	__builtin_ia32_vpermi2varps512_mask,
	__builtin_ia32_vpermi2varq512_mask, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_vpermilvarpd512_mask,
	__builtin_ia32_vpermilvarps512_mask,
	__builtin_ia32_vpermt2vard512_mask,
	__builtin_ia32_vpermt2vard512_maskz,
	__builtin_ia32_vpermt2varpd512_mask,
	__builtin_ia32_vpermt2varpd512_maskz,
	__builtin_ia32_vpermt2varps512_mask,
	__builtin_ia32_vpermt2varps512_maskz,
	__builtin_ia32_vpermt2varq512_mask,
	__builtin_ia32_vpermt2varq512_maskz, __builtin_ia32_permvardf512_mask,
	__builtin_ia32_permvardi512_mask, __builtin_ia32_permvarsf512_mask,
	__builtin_ia32_permvarsi512_mask, __builtin_ia32_pternlogd512_mask,
	__builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask,
	__builtin_ia32_pternlogq512_maskz, __builtin_ia32_copysignps512,
	__builtin_ia32_copysignpd512, __builtin_ia32_sqrtpd512,
	__builtin_ia32_sqrtps512, __builtin_ia32_exp2ps,
	__builtin_ia32_roundpd_az_vec_pack_sfix512,
	__builtin_ia32_floorpd_vec_pack_sfix512,
	__builtin_ia32_ceilpd_vec_pack_sfix512, __builtin_ia32_kandhi,
	__builtin_ia32_kandnhi, __builtin_ia32_knothi, __builtin_ia32_korhi,
	__builtin_ia32_kortestchi, __builtin_ia32_kortestzhi,
	__builtin_ia32_kunpckhi, __builtin_ia32_kxnorhi,
	__builtin_ia32_kxorhi, __builtin_ia32_addpd512_mask,
	__builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask,
	__builtin_ia32_addss_mask, __builtin_ia32_cmppd512_mask,
	__builtin_ia32_cmpps512_mask, __builtin_ia32_cmpsd_mask,
	__builtin_ia32_cmpss_mask, __builtin_ia32_vcomisd,
	__builtin_ia32_vcomiss, __builtin_ia32_cvtdq2ps512_mask,
	__builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask,
	__builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_vcvtph2ps512_mask,
	__builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask,
	__builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask,
	__builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32,
	__builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask,
	__builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask,
	__builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask,
	__builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64,
	__builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64,
	__builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask,
	__builtin_ia32_divsd_mask, __builtin_ia32_divss_mask,
	__builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz,
	__builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz,
	__builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz,
	__builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz,
	__builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask,
	__builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask,
	__builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask,
	__builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask,
	__builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask,
	__builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask,
	__builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask,
	__builtin_ia32_minsd_mask, __builtin_ia32_minss_mask,
	__builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask,
	__builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask,
	__builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask,
	__builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask,
	__builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask,
	__builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask,
	__builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask,
	__builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask,
	__builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask,
	__builtin_ia32_subsd_mask, __builtin_ia32_subss_mask,
	__builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64,
	__builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64,
	__builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64,
	__builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64,
	__builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64,
	__builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64,
	__builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64,
	__builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64,
	__builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3,
	__builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask,
	__builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz,
	__builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3,
	__builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask,
	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
	__builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_exp2pd_mask,
	__builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask,
	__builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask,
	__builtin_ia32_rsqrt28ps_mask, __builtin_ia32_gathersiv16sf,
	__builtin_ia32_gathersiv8df, __builtin_ia32_gatherdiv16sf,
	__builtin_ia32_gatherdiv8df, __builtin_ia32_gathersiv16si,
	__builtin_ia32_gathersiv8di, __builtin_ia32_gatherdiv16si,
	__builtin_ia32_gatherdiv8di, __builtin_ia32_gatheraltsiv8df ,
	__builtin_ia32_gatheraltdiv8sf , __builtin_ia32_gatheraltsiv8di ,
	__builtin_ia32_gatheraltdiv8si , __builtin_ia32_scattersiv16sf,
	__builtin_ia32_scattersiv8df, __builtin_ia32_scatterdiv16sf,
	__builtin_ia32_scatterdiv8df, __builtin_ia32_scattersiv16si,
	__builtin_ia32_scattersiv8di, __builtin_ia32_scatterdiv16si,
	__builtin_ia32_scatterdiv8di, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps.
	(ix86_init_mmx_sse_builtins): Handle builtins with AVX512 embeded
	rounding, builtins for AVX512 gathers/scatters.
	(ix86_expand_args_builtin): Handle new functions types, add warnings
	for masked builtins.
	(ix86_erase_embedded_rounding): Handle patterns with embedded rounding.
	(ix86_expand_sse_comi_round): Ditto.
	(ix86_expand_round_builtin): Ditto.
	(ix86_expand_builtin): Handle AVX512's gathers/scatters and kortest{z}.
	Call ix86_expand_round_builtin.
	* config/i386/immintrin.h: Add avx512fintrin.h, avx512erintrin.h,
	avx512pfintrin.h, avx512cdintrin.h.

2013-12-31  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/i386.c (MAX_CLASSES): Increase number of classes.
	(classify_argument): Extend for 512 bit vectors.
	(construct_container): Ditto.
	(function_arg_advance_32): Ditto.
	(function_arg_advance_64): Ditto.
	(function_arg_32): Ditto.
	(function_arg_64): Ditto.
	(function_value_32): Ditto.
	(return_in_memory_32): Ditto.
	(ix86_gimplify_va_arg): Ditto.
	(standard_sse_constant_p): Ditto.
	(standard_sse_constant_opcode): Ditto.
	(ix86_expand_vector_convert_uns_vsivsf): Ditto.
	(ix86_build_const_vector): Ditto.
	(ix86_build_signbit_mask): Ditto.
	(ix86_expand_sse_cmp): Extend for AVX512.
	(ix86_expand_sse_movcc): Ditto.
	(ix86_expand_int_vcond): Ditto.
	(ix86_expand_vec_perm): Ditto.
	(ix86_expand_sse_unpack): Ditto.
	(ix86_builtin_vectorized_function): Ditto.
	(ix86_vectorize_builtin_gather): Ditto.
	(avx_vpermilp_parallel): Ditto.
	(ix86_rtx_costs): Ditto.
	(ix86_expand_vector_init_duplicate): Ditto.
	(ix86_expand_vector_init_concat): Ditto.
	(ix86_expand_vector_init_general): Ditto.
	(ix86_expand_vector_extract): Ditto.
	(emit_reduc_half): Ditto.
	(ix86_vector_mode_supported_p): Ditto.
	(ix86_emit_swdivsf): Ditto.
	(ix86_emit_swsqrtsf): Ditto.
	(expand_vec_perm_1): Ditto.
	(ix86_vectorize_vec_perm_const_ok): Ditto.
	(ix86_expand_mul_widen_evenodd): Ditto.
	(ix86_expand_sse2_mulvxdi3): Ditto.
	(ix86_preferred_simd_mode): Ditto.
	(ix86_autovectorize_vector_sizes): Ditto.
	(ix86_expand_vec_perm_vpermi2): New.
	(ix86_vector_duplicate_value): Ditto.
	(IX86_BUILTIN_SQRTPD512, IX86_BUILTIN_EXP2PS,
	IX86_BUILTIN_SQRTPS_NR512, IX86_BUILTIN_GATHER3ALTDIV16SF,
	IX86_BUILTIN_GATHER3ALTDIV16SI, IX86_BUILTIN_GATHER3ALTSIV8DF,
	IX86_BUILTIN_GATHER3ALTSIV8DI, IX86_BUILTIN_GATHER3DIV16SF,
	IX86_BUILTIN_GATHER3DIV16SI, IX86_BUILTIN_GATHER3DIV8DF,
	IX86_BUILTIN_GATHER3DIV8DI, IX86_BUILTIN_GATHER3SIV16SF,
	IX86_BUILTIN_GATHER3SIV16SI, IX86_BUILTIN_GATHER3SIV8DF,
	IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512, IX86_BUILTIN_CPYSGNPS512,
	IX86_BUILTIN_CPYSGNPD512, IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512,
	IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512): Ditto.
	* config/i386/sse.md (*mov<mode>_internal): Disable SSE typeless
	stores vectors > 128bit (AVX*).
	(<sse>_storeu<ssemodesuffix><avxsizesuffix>): Ditto.
	(<sse2_avx_avx512f>_storedqu<mode>): Extend for AVX-512, disable
	SSE typeless stores vectors > 128bit (AVX*).
	(fixuns_trunc<mode><sseintvecmodelower>2): Extend for AVX-512.
	(vec_pack_ufix_trunc_<mode>): Ditto.
	(vec_unpacku_float_hi_v16si): New.
	* tree-vect-stmts.c (vectorizable_load): Support AVX512's gathers.
	* tree-vectorizer.h (MAX_VECTORIZATION_FACTOR): Extend for 512 bit
	vectors.

2013-12-31  Chung-Lin Tang  <cltang@codesourcery.com>
	    Sandra Loosemore  <sandra@codesourcery.com>
	    Based on patches from Altera Corporation

	* config.gcc (nios2-*-*): Add nios2 config targets.
	* configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case.
	("$cpu_type"): Add nios2 as new cpu type.
	* configure: Regenerate.
	* config/nios2/nios2.c: New file.
	* config/nios2/nios2.h: New file.
	* config/nios2/nios2-opts.h: New file.
	* config/nios2/nios2-protos.h: New file.
	* config/nios2/elf.h: New file.
	* config/nios2/elf.opt: New file.
	* config/nios2/linux.h: New file.
	* config/nios2/nios2.opt: New file.
	* config/nios2/nios2.md: New file.
	* config/nios2/predicates.md: New file.
	* config/nios2/constraints.md: New file.
	* config/nios2/t-nios2: New file.
	* common/config/nios2/nios2-common.c: New file.
	* doc/invoke.texi (Nios II options): Document Nios II specific options.
	* doc/md.texi (Nios II family): Document Nios II specific constraints.
	* doc/extend.texi (Function Specific Option Pragmas): Document
	Nios II supported target pragma functionality.

2013-12-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59591
	* tree-vect-stmts.c (vectorizable_mask_load_store): Fix up handling
	of modifier = NARROW masked gathers.
	(permute_vec_elements): Use gimple_get_lhs instead of
	gimple_assign_lhs.

2013-12-30  Nick Clifton  <nickc@redhat.com>
	    Peter Bigot  <bigotp@acm.org>

	PR target/59613
	* stor-layout.c (get_mode_bounds): Use GET_MODE_PRECISION instead
	of GET_MODE_BITSIZE.

2013-12-30  Nick Clifton  <nickc@redhat.com>

	* config/msp430/msp430.c (msp430_print_operand): Rename %B to %b
	and %A to %Q.  Add %A, %B, %C and %D as selectors for 16-bit parts
	of a 64-bit operand.
	* config/msp430/msp430.md: Replace uses of %B with %b and uses of
	%A with %q.

2013-12-30  Felix Yang  <felix.yang@huawei.com>

	* ira-costs.c (cost_classes_hasher::equal): Check equality of
	memcmp and 0 if no difference exists for HV1 and HV2.

2013-12-30  Jakub Jelinek  <jakub@redhat.com>

	PR target/59501
	* config/i386/i386.c (ix86_save_reg): Don't return true for drap_reg
	if !crtl->stack_realign_needed.
	(ix86_finalize_stack_realign_flags): If drap_reg isn't live on entry
	and stack_realign_needed will be false, clear drap_reg and need_drap.
	Optimize leaf functions that don't need stack frame even if
	crtl->need_drap.

2013-12-30   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59605
	* config/i386/i386.c (ix86_expand_set_or_movmem): Create
	jump_around_label only if it doesn't exist.

2013-12-28  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/invoke.texi (output file options): Document -fada-spec-parent.

2013-12-27  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/sse.md (avx512f_fixupimm<mode>_maskz): Extend to support
	EVEX's RC.
	(avx512f_sfixupimm<mode>_maskz): Ditto.
	* config/i386/subst.md (round_saeonly_expand_name): New.
	(round_saeonly_expand_nimm_predicate): Ditto.
	(round_saeonly_expand_operand6): Ditto.
	(round_saeonly_expand): Ditto.

2013-12-27  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/sse.md (avx512f_fmadd_<mode>_maskz): Extend to support
	EVEX's RC.
	(avx512f_fmaddsub_<mode>_maskz): Ditto.
	* config/i386/subst.md (round_expand_name): New.
	(round_expand_nimm_predicate): Ditto.
	(round_expand_operand): Ditto.
	(round_expand): Ditto.

2013-12-27  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/sse.md (<code><mode>3<mask_name>): Extend to support
	EVEX's SAE mode.
	(*<code><mode>3_finite<mask_name>): Ditto.
	(*<code><mode>3<mask_name>): Ditto.
	(avx512f_cmp<mode>3<mask_scalar_merge_name>): Ditto.
	(avx512f_vmcmp<mode>3): Ditto.
	(avx512f_vmcmp<mode>3_mask): Ditto.
	(<sse>_comi): Ditto.
	(<sse>_ucomi): Ditto.
	(sse_cvttss2si): Ditto.
	(sse_cvttss2siq): Ditto.
	(<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto.
	(avx512f_vcvttss2usi): Ditto.
	(avx512f_vcvttss2usiq): Ditto.
	(avx512f_vcvttsd2usi): Ditto.
	(avx512f_vcvttsd2usiq): Ditto.
	(sse2_cvttsd2si): Ditto.
	(sse2_cvttsd2siq): Ditto.
	(<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto.
	(<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto.
	(avx512f_getexp<mode><mask_name>): Ditto.
	(avx512f_fixupimm<mode><sd_maskz_name>): Ditto.
	(avx512f_fixupimm<mode>_mask): Ditto.
	(avx512f_sfixupimm<mode><sd_maskz_name>): Ditto.
	(avx512f_sfixupimm<mode>_mask): Ditto.
	(avx512f_rndscale<mode><mask_name>): Ditto.
	(<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto.
	(avx512f_getmant<mode><mask_name>): Ditto.
	* config/i386/subst.md (round_saeonly_name): New.
	(round_saeonly_mask_operand2): Ditto.
	(round_saeonly_mask_operand3): Ditto.
	(round_saeonly_mask_scalar_operand3): Ditto.
	(round_saeonly_mask_scalar_operand4): Ditto.
	(round_saeonly_mask_scalar_merge_operand4): Ditto.
	(round_saeonly_sd_mask_operand5): Ditto.
	(round_saeonly_op2): Ditto.
	(round_saeonly_op4): Ditto.
	(round_saeonly_op5): Ditto.
	(round_saeonly_op6): Ditto.
	(round_saeonly_mask_op2): Ditto.
	(round_saeonly_mask_op3): Ditto.
	(round_saeonly_mask_scalar_op3): Ditto.
	(round_saeonly_mask_scalar_op4): Ditto.
	(round_saeonly_mask_scalar_merge_op4): Ditto.
	(round_saeonly_sd_mask_op5): Ditto.
	(round_saeonly_constraint): Ditto.
	(round_saeonly_constraint2): Ditto.
	(round_saeonly_nimm_predicate): Ditto.
	(round_saeonly_mode512bit_condition): Ditto.
	(round_saeonly): Ditto.

2013-12-27  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/i386.c (ix86_print_operand): Print EVEX's RC modifiers.
	* config/i386/i386.md (define_constants): Define EVEx's RC constants.
	* gcc/config/i386/sse.md (<plusminus_insn><mode>3<mask_name>): Extend
	to support EVEX's rounding control.
	(*<plusminus_insn><mode>3<mask_name>): Ditto.
	(mul<mode>3<mask_name>): Ditto.
	(*mul<mode>3<mask_name>): Ditto.
	(<sse>_div<mode>3<mask_name>): Ditto.
	(<sse>_sqrt<mode>2<mask_name>): Ditto.
	(<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>): Ditto.
	(avx512f_fmadd_<mode>_mask): Ditto.
	(avx512f_fmadd_<mode>_mask3): Ditto.
	(<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>): Ditto.
	(avx512f_fmsub_<mode>_mask): Ditto.
	(avx512f_fmsub_<mode>_mask3): Ditto.
	(<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>): Ditto.
	(avx512f_fnmadd_<mode>_mask): Ditto.
	(avx512f_fnmadd_<mode>_mask3): Ditto.
	(<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>): Ditto.
	(avx512f_fnmsub_<mode>_mask): Ditto.
	(avx512f_fnmsub_<mode>_mask3): Ditto.
	(<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name>): Ditto.
	(avx512f_fmaddsub_<mode>_mask): Ditto.
	(avx512f_fmaddsub_<mode>_mask3): Ditto.
	(<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name>): Ditto.
	(avx512f_fmsubadd_<mode>_mask): Ditto.
	(avx512f_fmsubadd_<mode>_mask3): Ditto.
	(fmai_vmfmadd_<mode>): Ditto.
	(*fmai_fmadd_<mode>): Ditto.
	(*fmai_fmsub_<mode>): Ditto.
	(*fmai_fnmadd_<mode>): Ditto.
	(*fmai_fnmsub_<mode>): Ditto.
	(sse_cvtsi2ss): Ditto.
	(sse_cvtsi2ssq): Ditto.
	(sse_cvtss2si): Ditto.
	(sse_cvtss2siq): Ditto.
	(cvtusi2<ssescalarmodesuffix>32): Ditto.
	(cvtusi2<ssescalarmodesuffix>64): Ditto.
	(float<sseintvecmodelower><mode>2<mask_name>): Ditto.
	(ufloatv16siv16sf2<mask_name>): Ditto.
	(<mask_codefor>avx512f_fix_notruncv16sfv16si<mask_name>): Ditto.
	(<mask_codefor>avx512f_ufix_notruncv16sfv16si<mask_name>): Ditto.
	(sse2_cvtsi2sdq): Ditto.
	(avx512f_vcvtss2usi): Ditto.
	(avx512f_vcvtss2usiq): Ditto.
	(avx512f_vcvtsd2usi): Ditto.
	(avx512f_vcvtsd2usiq): Ditto.
	(sse2_cvtsd2si): Ditto.
	(sse2_cvtsd2siq): Ditto.
	(<mask_codefor>avx512f_cvtpd2dq512<mask_name>): Ditto.
	(avx512f_ufix_notruncv8dfv8si<mask_name>): Ditto.
	(<mask_codefor>avx512f_cvtpd2ps512<mask_name>): Ditto.
	(avx512f_scalef<mode><mask_name>): Ditto.
	(<code><mode>3<mask_name>): Ditto.
	(*avx2_<code><mode>3<mask_name>): Ditto.
	(avx512er_exp2<mode><mask_name): Ditto.
	(<mask_codefor>avx512er_rcp28<mode><mask_name>): Ditto.
	(<mask_codefor>avx512er_rsqrt28<mode><mask_name>): Ditto.
	(avx512f_fmadd_<mode>_maskz): New.
	* config/i386/subst.md (SUBST_A): New.
	(round_name): Ditto.
	(round_mask_operand2): Ditto.
	(round_mask_operand3): Ditto.
	(round_mask_scalar_operand3): Ditto.
	(round_sd_mask_operand4): Ditto.
	(round_op2): Ditto.
	(round_op3): Ditto.
	(round_op4): Ditto.
	(round_op5): Ditto.
	(round_op6): Ditto.
	(round_mask_op2): Ditto.
	(round_mask_op3): Ditto.
	(round_mask_scalar_op3): Ditto.
	(round_sd_mask_op4): Ditto.
	(round_constraint): Ditto.
	(round_constraint2): Ditto.
	(round_constraint3): Ditto.
	(round_nimm_predicate): Ditto.
	(round_mode512bit_condition): Ditto.
	(round_modev4sf_condition): Ditto.
	(round_codefor): Ditto.
	(round_opnum): Ditto.
	(round): Ditto.

2013-12-26   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59588
	* config/i386/i386.c (ix86_option_override_internal): Don't
	check generic tuning.  Don't change i686 tuning.

2013-12-26   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59601
	* config/i386/i386.c (get_builtin_code_for_version): Map
	PROCESSOR_NEHALEM to "corei7".

2013-12-26  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	* config/i386/i386.c (get_builtin_code_for_version): Rename AMD
	CPU names M_AMD_BOBCAT to M_AMD_BTVER1 and M_AMD_JAGUAR
	to M_AMD_BTVER2.
	(processor_model): Likewise.
	(arch_names_table): Likewise.

2013-12-26  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/driver-i386.c (decode_caches_intel): Add missing entries.

2013-12-25   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59587
	* config/i386/i386.c (struct ptt): Add a field for processor name.
	(processor_target_table): Sync with processor_type.
	Add processor names.
	(cpu_names): Removed.
	(ix86_option_override_internal): Default x_ix86_tune_string
	to processor_target_table[TARGET_CPU_DEFAULT].name.
	(ix86_function_specific_print): Assert arch and tune < PROCESSOR_max.
	Use processor_target_table to print arch and tune names.
	* config/i386/i386.h (TARGET_CPU_DEFAULT): Default to
	PROCESSOR_GENERIC.
	(target_cpu_default): Removed.
	(processor_type): Reordered.

2013-12-25  Allan Sandfeld Jensen  <sandfeld@kde.org>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59422
	* config/i386/i386.c (get_builtin_code_for_version): Handle
	PROCESSOR_HASWELL, PROCESSOR_SILVERMONT, PROCESSOR_BTVER1,
	PROCESSOR_BTVER2, PROCESSOR_BDVER3 and PROCESSOR_BDVER4.
	Change priority of PROCESSOR_BDVER1 to P_PROC_XOP.
	(fold_builtin_cpu): Add "ivybridge", "haswell", "bonnell",
	"silvermont", "bobcat" and "jaguar" CPU names.  Add "sse4a",
	"fma4", "xop" and "fma" ISA names.

2013-12-24   H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.c (ix86_option_override_internal): Check
	opts->x_ix86_arch_string instead of ix86_arch_string.

2013-12-24  Renlin Li  <Renlin.Li@arm.com>

	* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
	* config/arm/constraints.md (Dp): Define new constraint.
	* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
	new predicate.
	* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
	(vfp3_const_double_for_bits): New function.
	* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.

2013-12-23  Hans-Peter Nilsson  <hp@axis.com>

	PR target/59203
	* config/cris/cris.c (cris_pic_symbol_type_of): Fix typo,
	checking t1 twice instead of t1 and t2 respectively.

	PR middle-end/59584
	* config/cris/predicates.md (cris_nonsp_register_operand):
	New define_predicate.
	* config/cris/cris.md: Replace register_operand with
	cris_nonsp_register_operand for destinations in all
	define_splits where a register is set more than once.

2013-12-23  Jason Merrill  <jason@redhat.com>

	* gdbinit.in (input_line, input_filename): Define.

	* cgraph.h (struct cgraph_node): Add calls_comdat_local.
	(symtab_comdat_local_p, symtab_in_same_comdat_p): New.
	* cif-code.def: Add USES_COMDAT_LOCAL.
	* symtab.c (verify_symtab_base): Make sure we don't refer to a
	comdat-local symbol from outside its comdat.
	* cgraph.c (verify_cgraph_node): Likewise.
	* cgraphunit.c (mark_functions_to_output): Don't mark comdat-locals.
	* ipa.c (symtab_remove_unreachable_nodes): Likewise.
	(function_and_variable_visibility): Handle comdat-local fns.
	* ipa-cp.c (determine_versionability): Don't clone comdat-locals.
	* ipa-inline-analysis.c (compute_inline_parameters): Update
	calls_comdat_local.
	* ipa-inline-transform.c (inline_call): Likewise.
	(save_inline_function_body): Don't clear DECL_COMDAT_GROUP.
	* ipa-inline.c (can_inline_edge_p): Check calls_comdat_local.
	* lto-cgraph.c (input_overwrite_node): Read calls_comdat_local.
	(lto_output_node): Write it.
	* symtab.c (symtab_dissolve_same_comdat_group_list): Clear
	DECL_COMDAT_GROUP for comdat-locals.

2013-12-23   H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.c (processor_target_table): Move Bonnell and
	Silvermont entries before generic.

2013-12-23  Bingfeng Mei  <bmei@broadcom.com>

	PR middle-end/59569
	* tree-vect-stmts.c (vectorizable_store): Skip permutation for
	consant/external operand, and add a few missing \n.

2013-12-23   H.J. Lu  <hongjiu.lu@intel.com>
	     Tocar Ilya  <ilya.tocar@intel.com>

	* config/i386/core2.md: Replace corei7 with nehalem.

	* config/i386/driver-i386.c (host_detect_local_cpu): Use nehalem,
	westmere, sandybridge, ivybridge, haswell, bonnell, silvermont
	for cpu names.

	* config/i386/i386-c.c (ix86_target_macros_internal): Replace
	PROCESSOR_COREI7, PROCESSOR_COREI7_AVX, PROCESSOR_ATOM,
	PROCESSOR_SLM with PROCESSOR_NEHALEM, PROCESSOR_SANDYBRIDGE,
	PROCESSOR_BONNELL, PROCESSOR_SILVERMONT.  Define
	__nehalem/__nehalem__, __sandybridge/__sandybridge__,
	__haswell/__haswell__, __tune_nehalem__, __tune_sandybridge__,
	__tune_haswell__, __bonnell/__bonnell__,
	__silvermont/__silvermont__, __tune_bonnell__,
	__tune_silvermont__.

	* config/i386/i386.c (m_COREI7): Renamed to ...
	(m_NEHALEM): This.
	(m_COREI7_AVX): Renamed to ...
	(m_SANDYBRIDGE): This.
	(m_ATOM): Renamed to ...
	(m_BONNELL): This.
	(m_SLM): Renamed to ...
	(m_SILVERMONT): This.
	(m_CORE_ALL): Updated.
	(cpu_names): Add "nehalem", "westmere", "sandybridge",
	"ivybridge", "haswell", "broadwell", "bonnell", "silvermont".
	(PTA_CORE2): New.
	(PTA_NEHALEM): Likewise.
	(PTA_WESTMERE): Likewise.
	(PTA_SANDYBRIDGE): Likewise.
	(PTA_IVYBRIDGE): Likewise.
	(PTA_HASWELL): Likewise.
	(PTA_BROADWELL): Likewise.
	(PTA_BONNELL): Likewise.
	(PTA_SILVERMONT): Likewise.
	(ix86_option_override_internal): Use new PTA_XXX.  Add nehalem,
	westmere, sandybridge, ivybridge, haswell, bonnell, silvermont.
	(ix86_lea_outperforms): Updated.
	(ix86_issue_rate): Likewise.
	(ix86_adjust_cost): Likewise.
	(ia32_multipass_dfa_lookahead): Likewise.
	(do_reorder_for_imul): Likewise.
	(swap_top_of_ready_list): Likewise.
	(ix86_sched_reorder): Likewise.
	(ix86_sched_init_global): Likewise.
	(get_builtin_code_for_version): Likewise.
	(processor_model): Replace M_INTEL_ATOM, M_INTEL_SLM with
	M_INTEL_BONNELL, M_INTEL_SILVERMONT.
	(arch_names_table): Updated.

	* config/i386/i386.h (TARGET_COREI7): Removed.
	(TARGET_COREI7_AVX): Likewise.
	(TARGET_ATOM): Likewise.
	(TARGET_SLM): Likewise.
	(TARGET_NEHALEM): New.
	(TARGET_SANDYBRIDGE): Likewise.
	(TARGET_BONNELL): Likewise.
	(TARGET_SILVERMONT): Likewise.
	(target_cpu_default): Add TARGET_CPU_DEFAULT_core_avx2,
	TARGET_CPU_DEFAULT_nehalem, TARGET_CPU_DEFAULT_westmere,
	TARGET_CPU_DEFAULT_sandybridge, TARGET_CPU_DEFAULT_ivybridge,
	TARGET_CPU_DEFAULT_broadwell, TARGET_CPU_DEFAULT_bonnell,
	TARGET_CPU_DEFAULT_silvermont.  Move TARGET_CPU_DEFAULT_haswell
	before TARGET_CPU_DEFAULT_broadwell.
	(processor_type): Replace PROCESSOR_COREI7, PROCESSOR_COREI7_AVX,
	PROCESSOR_ATOM, PROCESSOR_SLM with PROCESSOR_NEHALEM,
	PROCESSOR_SANDYBRIDGE, PROCESSOR_BONNELL, PROCESSOR_SILVERMONT.

	* config/i386/i386.md (cpu): Replace corei7 with nehalem.

	* config/i386/x86-tune.def: Updated.

	* doc/invoke.texi: Replace corei7, corei7-avx, core-avx-i,
	core-avx2, atom, slm with nehalem, sandybridge, ivybridge,
	haswell, bonnel, silvermont.  Add westmere.

2013-12-23  Andrey Belevantsev  <abel@ispras.ru>

	PR rtl-optimization/57422
	* sel-sched.c (fill_vec_av_set): Assert that the fence insn
	can always be scheduled in its current form.

2013-12-23  Andrey Belevantsev  <abel@ispras.ru>

	PR rtl-optimization/57422
	* sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling
	add_to_hard_reg_set.

2013-12-20  Sharad Singhai  <singhai@google.com>

	* Makefile.in: Add optinfo.texi.
	* doc/invoke.texi: Fix typo.
	* doc/optinfo.texi: New documentation for optimization info.
	* doc/passes.texi: Add new node.

2013-12-20  Trevor saunders  <tsaunders@mozilla.com>

	* vec.h (stack_vec): Convert to a templaate specialization of
	auto_vec.
	* config/i386/i386.c, df-scan.c, function.c, genautomata.c,
	gimplify.c, graphite-clast-to-gimple.c, graphite-dependences.c,
	graphite-scop-detection.c, graphite-sese-to-poly.c, hw-doloop.c,
	trans-mem.c, tree-call-cdce.c, tree-data-ref.c, tree-dfa.c,
	tree-if-conv.c, tree-inline.c, tree-loop-distribution.c,
	tree-parloops.c, tree-predcom.c, tree-ssa-alias.c,
	tree-ssa-loop-ivcanon.c, tree-ssa-phiopt.c, tree-ssa-threadedge.c,
	tree-ssa-uncprop.c, tree-vect-loop.c, tree-vect-patterns.c,
	tree-vect-slp.c, tree-vect-stmts.c, var-tracking.c: Adjust.

2013-12-20  Eric Botcazou  <ebotcazou@adacore.com>

	* config/arm/arm.c (arm_expand_prologue): In a nested APCS frame with
	arguments to push onto the stack and no varargs, save ip into the last
	stack slot if r3 isn't available on entry.

2013-12-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64.
	* config/arm/arm_neon.h: Regenerate.
	* config/arm/neon-docgen.ml: Add vceq_p64 and vtst_p64.
	* doc/arm-neon-intrinsics.texi: Regenerate.

2013-12-20  Vladimir Makarov  <vmakarov@redhat.com>

	* config/arm/arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return
	NO_REGS for LRA.

2013-12-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm_acle.h: Add underscores before variables.

2013-12-20  Bingfeng Mei  <bmei@broadcom.com>

	PR tree-optimization/59544
	* tree-vect-stmts.c (perm_mask_for_reverse): Move before
	vectorizable_store.
	(vectorizable_store): Handle negative step.

2013-12-20  Tocar Ilya  <ilya.tocar@intel.com>

	* config.gcc: Support march=broadwell.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell.
	* config/i386/i386.c (ix86_option_override_internal): Add broadwell.
	* doc/invoke.texi: Document march=broadwell.

2013-12-20  Jakub Jelinek  <jakub@redhat.com>

	* ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h.
	(ubsan_type_descriptor): Handle BOOLEAN_TYPE and ENUMERAL_TYPE
	like INTEGER_TYPE.
	(instrument_bool_enum_load): New function.
	(ubsan_pass): Call it.
	(gate_ubsan): Also enable for SANITIZE_BOOL or SANITIZE_ENUM.
	* asan.c (create_cond_insert_point): No longer static.
	* asan.h (create_cond_insert_point): Declare.
	* sanitizer.def (BUILT_IN_UBSAN_HANDLE_LOAD_INVALID_VALUE): New
	built-in.
	* opts.c (common_handle_option): Handle -fsanitize=bool and
	-fsanitize=enum.
	* builtins.c (fold_builtin_memory_op): When sanitizing bool
	and enum loads, don't use enum or bool types for memcpy folding.
	* flag-types.h (SANITIZE_BOOL, SANITIZE_ENUM): New.
	(SANITIZE_UNDEFINED): Or these in.

2013-12-20  Chung-Ju Wu  <jasonwucj@gmail.com>

	* config/nds32/nds32.h (NDS32_MODE_TYPE_ALIGN): New macro.
	(NDS32_AVAILABLE_REGNUM_FOR_ARG): Use more accurate alignment checking
	to determine available register number.
	* config/nds32/nds32.c (nds32_needs_double_word_align): Use new
	macro NDS32_MODE_TYPE_ALIGN.
	(nds32_function_arg): Refine code layout.

2013-12-19  Jeff Law  <law@redhat.com>

	* doc/invoke.texi: (dump-rtl-ree): Fix typo and clarify ree
	handles both zero and sign extension.

2013-12-19  Teresa Johnson  <tejohnson@google.com>

	PR gcov-profile/59542
	* bb-reorder.c (duplicate_computed_gotos): Invoke fixup_partitions
	if we have made any changes.

2013-12-19  Jakub Jelinek  <jakub@redhat.com>

	PR other/59545
	* genattrtab.c (struct attr_hash): Change hashcode type to unsigned.
	(attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter
	to unsigned.
	(attr_rtx_1): Change hashcode variable to unsigned.
	(attr_string): Likewise.  Perform first multiplication in
	unsigned type.
	* ifcvt.c (noce_try_store_flag_constants): Avoid signed integer
	overflows.
	* double-int.c (neg_double): Likewise.
	* stor-layout.c (set_min_and_max_values_for_integral_type): Likewise.
	* combine.c (force_to_mode): Likewise.
	* postreload.c (move2add_use_add2_insn, move2add_use_add3_insn,
	reload_cse_move2add, move2add_note_store): Likewise.
	* simplify-rtx.c (simplify_const_unary_operation,
	simplify_const_binary_operation): Likewise.
	* ipa-split.c (find_split_points): Initialize first.can_split
	and first.non_ssa_vars.
	* gengtype-state.c (read_state_files_list): Fix up check.
	* genautomata.c (reserv_sets_hash_value): Use portable rotation idiom.

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon-docgen.ml: Add crypto intrinsics documentation.
	* doc/arm-neon-intrinsics.texi: Regenerate.

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO".

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm.c (enum arm_builtins): Add crypto builtins.
	(arm_init_neon_builtins): Handle crypto builtins.
	(bdesc_2arg): Likewise.
	(bdesc_1arg): Likewise.
	(bdesc_3arg): New table.
	(arm_expand_ternop_builtin): New function.
	(arm_expand_unop_builtin): Handle sha1h explicitly.
	(arm_expand_builtin): Handle ternary builtins.
	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS):
	Define __ARM_FEATURE_CRYPTO.
	* config/arm/arm.md: Include crypto.md.
	(is_neon_type): Add crypto types.
	* config/arm/arm_neon_builtins.def: Add TImode reinterprets.
	* config/arm/crypto.def: New.
	* config/arm/crypto.md: Likewise.
	* config/arm/iterators.md (CRYPTO_UNARY): New int iterator.
	(CRYPTO_BINARY): Likewise.
	(CRYPTO_TERNARY): Likewise.
	(CRYPTO_SELECTING): Likewise.
	(crypto_pattern): New int attribute.
	(crypto_size_sfx): Likewise.
	(crypto_mode): Likewise.
	(crypto_type): Likewise.
	* config/arm/neon-gen.ml: Handle poly64_t and poly128_t types.
	Handle crypto intrinsics.
	* config/arm/neon.ml: Add support for poly64 and polt128 types
	and intrinsics. Define crypto intrinsics.
	* config/arm/neon.md (neon_vreinterpretti<mode>): New pattern.
	(neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator.
	(neon_vreinterpretv8hi<mode>): Likewise.
	(neon_vreinterpretv4si<mode>): Likewise.
	(neon_vreinterpretv4sf<mode>): Likewise.
	(neon_vreinterpretv2di<mode>): Likewise.
	* config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC)
	(UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H)
	(UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2)
	(UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define.
	* config/arm/arm_neon.h: Regenerate.

2013-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	PR driver/59321
	* collect2.c (main): Check -fuse-ld=[bfd|gold] when
	DEFAULT_LINKER is defined.
	* common.opt (fuse-ld=bfd): Add Driver.
	(fuse-ld=gold): Likewise.
	* gcc.c (use_ld): New variable.
	(driver_handle_option): Set use_ld for OPT_fuse_ld_bfd and
	OPT_fuse_ld_gold.
	(main): Check -fuse-ld=[bfd|gold] for -print-prog-name=ld.

2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi.
	* config.gcc (extra_headers): Add arm_acle.h.
	* config/arm/arm.c (FL_CRC32): Define.
	(arm_have_crc): Likewise.
	(arm_option_override): Set arm_have_crc.
	(arm_builtins): Add CRC32 builtins.
	(bdesc_2arg): Likewise.
	(arm_init_crc32_builtins): New function.
	(arm_init_builtins): Initialise CRC32 builtins.
	(arm_file_start): Handle architecture extensions.
	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
	__ARM_FEATURE_CRC32.  Define __ARM_32BIT_STATE.
	(TARGET_CRC32): Define.
	* config/arm/arm-arches.def: Add armv8-a+crc.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm.md (type): Add crc.
	(<crc_variant>): New insn.
	* config/arm/arm_acle.h: New file.
	* config/arm/iterators.md (CRC): New int iterator.
	(crc_variant, crc_mode): New int attributes.
	* confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W,
	UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs.
	* doc/invoke.texi: Document -march=armv8-a+crc option.
	* doc/extend.texi: Document ACLE intrinsics.

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb
	patterns.
	* config/arm/ldmstm.md: Regenerate.

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (arm_hard_general_register_operand):
	New predicate.
	(arm_hard_register_operand): Remove.
	* config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand
	for all patterns.
	* config/arm/ldmstm.md: Regenerate.

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
	* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
	vfp_hard_register_operand.

2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
	Define builtin types for poly64_t poly128_t.
	(TYPES_BINOPP, aarch64_types_binopp_qualifiers): New.
	* aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi,
	aarch64_crypto_pmullv2di): New.
	* config/aarch64/aarch64.c (aarch64_simd_mangle_map): Update table for
	poly64x2_t mangler.
	* config/aarch64/arm_neon.h (poly64x2_t, poly64_t, poly128_t): Define.
	(vmull_p64, vmull_high_p64): New.
	* config/aarch64/iterators.md (UNSPEC_PMULL<2>): New.

2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-simd.md
	(aarch64_crypto_sha256h<sha256_op>v4si, aarch64_crypto_sha256su0v4si,
	aarch64_crypto_sha256su1v4si): New.
	* config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32,
	vsha256su0q_u32, vsha256su1q_u32): New.
	* config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>):
	New.
	(CRYPTO_SHA256): New int iterator.
	(sha256_op): New int attribute.

2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-builtins.c (aarch64_types_ternopu_qualifiers,
	TYPES_TERNOPU): New.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hsi,
	aarch64_crypto_sha1su1v4si, aarch64_crypto_sha1<sha1_op>v4si,
	aarch64_crypto_sha1su0v4si): New.
	* config/aarch64/arm_neon.h (vsha1cq_u32, sha1mq_u32, vsha1pq_u32,
	vsha1h_u32, vsha1su0q_u32, vsha1su1q_u32): New.
	* config/aarch64/iterators.md (UNSPEC_SHA1<CPMH>, UNSPEC_SHA1SU<01>):
	New.
	(CRYPTO_SHA1): New int iterator.
	(sha1_op): New int attribute.

2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-builtins.c (aarch64_types_binopu_qualifiers,
	TYPES_BINOPU): New.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aes_op>v16qi,
	aarch64_crypto_aes<aesmc_op>v16qi): New.
	* config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8,
	vaesimcq_u8): New.
	* config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC,
	UNSPEC_AESIMC): New.
	(CRYPTO_AES, CRYPTO_AESMC): New int iterators.
	(aes_op, aesmc_op): New int attributes.

2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>

	* config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
	crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
	crypto_sha256_slow): New.

2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64.h (TARGET_CRYPTO): New.
	(__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true.

2013-12-19  Dominik Vogt  <vogt@linux.vnet.ibm.com>
	    Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New
	constant.
	(s390_hotpatch_trampoline_halfwords_max): New constant.
	(s390_hotpatch_trampoline_halfwords): New static variable.
	(get_hotpatch_attribute): New function.
	(s390_handle_hotpatch_attribute): New function.
	(s390_attribute_table): New target specific attribute table to
	implement the hotpatch attribute.
	(s390_option_override): Parse hotpatch options.
	(s390_function_num_hotpatch_trampoline_halfwords): New function.
	(s390_can_inline_p): Implement target hook to
	suppress hotpatching for explicitly inlined functions.
	(s390_asm_output_function_label): Generate hotpatch prologue.
	(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table.
	(TARGET_CAN_INLINE_P): Define to implement target hook.
	* config/s390/s390.opt (mhotpatch): New options -mhotpatch,
	-mhotpatch=.
	* config/s390/s390-protos.h (s390_asm_output_function_label): Add
	prototype.
	* config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific
	function label generation for hotpatching.
	(FUNCTION_BOUNDARY): Align functions to eight bytes.
	* doc/extend.texi: Document hotpatch attribute.
	* doc/invoke.texi: Document -mhotpatch option.

2013-12-19  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	* config/i386/i386.c: Include cfgloop.h.
	(ix86_loop_memcount): New function.
	(ix86_loop_unroll_adjust): New function.
	(TARGET_LOOP_UNROLL_ADJUST): Define.
	* config/i386/i386.h
	(TARGET_ADJUST_UNROLL): Define.
	* config/i386/x86-tune.def
	(X86_TUNE_ADJUST_UNROLL): Define.

2013-12-19  Marek Polacek  <polacek@redhat.com>

	* config/i386/i386.c (ix86_parse_stringop_strategy_string): Remove
	variable alg.  Use index variable i directly.

2013-12-19  Eric Botcazou  <ebotcazou@adacore.com>

	* print-tree.c (print_node) <case tcc_type>: Print no_force_blk_flag
	for all types.

2013-12-19  Monk Chiang  <sh.chiang04@gmail.com>

	* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
	Consider TARGET_CPU_DEFAULT settings.

2013-12-18  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-cores.def: Add support for
	-mcpu=cortex-a57.cortex-a53.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53.

2013-12-18  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-cores.def: Add new column for SCHEDULER_IDENT.
	* config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle SCHEDULER_IDENT.
	* config/aarch64/aarch64.c (AARCH64_CORE): Handle SCHEDULER_IDENT.
	(aarch64_parse_cpu): mcpu implies a default value for mtune.
	* config/aarch64/aarch64.h (AARCH64_CORE): Handle SCHEDULER_IDENT.

2013-12-18  James Greenhalgh  <james.greenhalgh@arm.com>

	* common/config/aarch64/aarch64-common.c
	(aarch64_rewrite_selected_cpu): New.
	(aarch64_rewrite_mcpu): New.
	* config/aarch64/aarch64-protos.h
	(aarch64_rewrite_selected_cpu): New.
	* config/aarch64/aarch64.h (BIG_LITTLE_SPEC): New.
	(BIG_LITTLE_SPEC_FUNCTIONS): Likewise.
	(ASM_CPU_SPEC): Likewise.
	(EXTRA_SPEC_FUNCTIONS): Likewise.
	(EXTRA_SPECS): Likewise.
	(ASM_SPEC): Likewise.
	* config/aarch64/aarch64.c (aarch64_start_file): Rewrite target
	CPU name.

2013-12-18  Balaji V. Iyer  <balaji.v.iyer@intel.com>

	* omp-low.c (simd_clone_clauses_extract): Replaced the string
	"cilk simd elemental" with "cilk simd function."
	* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
	Removed a carriage-return from a warning string.

2013-12-18  Aldy Hernandez  <aldyh@redhat.com>

	* passes.c (execute_function_dump): Set graph_dump_initialized
	appropriately.
	(pass_init_dump_file): Similarly.
	(execute_one_pass): Pass new argument to do_per_function.
	* tree-pass.h (class opt_pass): New field graph_dump_initialized.

2013-12-18  Aldy Hernandez  <aldyh@redhat.com>

	* doc/tree-ssa.texi (SSA Operands): Remove reference to
	SSA_OP_VMAYUSE.
	Synchronize SSA_OP* definitions with source.
	* ssa-iterators.h: Fix comment for FOR_EACH_IMM_USE_STMT.
	Add not to SSA_OP* macro definitions.

2013-12-18  Jakub Jelinek  <jakub@redhat.com>

	PR target/59539
	* config/i386/sse.md
	(<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
	<sse2_avx_avx512f>_loaddqu<mode><mask_name>): New expanders,
	prefix existing define_insn names with *.

2013-12-18  Eric Botcazou  <ebotcazou@adacore.com>

	* config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko.

2013-12-18  James Greenhalgh  <james.greenhalgh@arm.com>
	    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/t-aprofile: Add cortex-a15.cortex-a7, cortex-a12,
	cortex-a57, cortex-a57.cortex-a53.

2013-12-18  Eric Botcazou  <ebotcazou@adacore.com>

	PR debug/59418
	* dwarf2cfi.c (dwarf2out_frame_debug_cfa_offset): Fix comment and tidy.
	(dwarf2out_frame_debug_cfa_restore): Handle TARGET_DWARF_REGISTER_SPAN.
	(dwarf2out_frame_debug_expr): Tidy.

2013-12-18  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/sse.md (*fma_fmadd_<mode>): Extend to support masking.
	(*fma_fmsub_<mode>): Ditto.
	(*fma_fnmadd_<mode>): Ditto.
	(*fma_fnmsub_<mode>): Ditto.
	(*fma_fmaddsub_<mode>): Ditto.
	(*fma_fmsubadd_<mode>): Ditto.
	(avx512f_vternlog<mode>): Ditto.
	(avx512f_fixupimm<mode>): Ditto.
	(avx512f_sfixupimm<mode>): Ditto.
	(avx512f_vpermi2var<mode>3): Ditto.
	(avx512f_vpermt2var<mode>3): Ditto.
	(avx512f_fmaddsub_<mode>_maskz): New.
	(avx512f_vternlog<mode>_maskz): Ditto.
	(avx512f_fixupimm<mode>_maskz): Ditto.
	(avx512f_sfixupimm<mode>_maskz): Ditto.
	(avx512f_vpermi2var<mode>3_maskz): Ditto.
	(avx512f_vpermt2var<mode>3_maskz): Ditto.
	(avx512f_expand<mode>_maskz): Ditto.
	* config/i386/subst.md (sd_maskz_name): Ditto.
	(sd_mask_op4): Ditto.
	(sd_mask_op5): Ditto.
	(sd_mask_codefor): Ditto.
	(sd_mask_mode512bit_condition): Ditto.
	(sd): Ditto.

2013-12-18  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/i386/sse.md (avx512f_cmp<mode>3): Extend to support masking.
	(avx512f_ucmp<mode>3): Ditto.
	(avx512f_eq<mode>3): Ditto.
	(avx512f_gt<mode>3): Ditto.
	(avx512f_testm<mode>3): Ditto.
	(avx512f_testnm<mode>3): Ditto.
	* config/i386/subst.md (SUBST_S): New.
	(mask_scalar_merge_name): Ditto.
	(mask_scalar_merge_operand3): Ditto.
	(mask_scalar_merge_operand4): Ditto.
	(mask_scalar_merge): Ditto.

2013-12-17  Jan Hubicka  <hubicka@ucw.cz>

	PR middle-end/35545
	* gimple-fold.c (fold_gimple_assign): Attempt to devirtualize
	OBJ_TYPE_REF.
	(gimple_fold_stmt_to_constant_1): Bypass OBJ_TYPE_REF wrappers.

2013-12-17  Jan Hubicka  <hubicka@ucw.cz>

	PR middle-end/35545
	* tree-vrp.c (extract_range_from_unary_expr_1): Handle OBJ_TYPE_REF.

2013-12-17  Teresa Johnson  <tejohnson@google.com>

	PR gcov-profile/59527
	* cfgrtl.c (fixup_reorder_chain): Handle a region-crossing
	branch, which can't be eliminated.

2013-12-18  Martin Liska  <marxin.liska@gmail.com>
	    Jan Hubicka  <jh@suse.cz>

	* cgraphunit.c (node_cmp): New function.
	(expand_all_functions): Function ordering added.
	* common.opt: New profile based function reordering flag introduced.
	* lto-partition.c: Support for time profile added.
	* lto.c: Likewise.
	* predict.c (handle_missing_profiles): Time profile handled in
	  missing profiles.

2013-12-17  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59523
	* tree-vectorizer.c (fold_loop_vectorized_call): Call update_stmt
	on updated stmts.

2013-12-17  Aldy Hernandez  <aldyh@redhat.com>

	* ipa-inline.c (gate_ipa_inline): Remove.
	(const pass_data pass_data_ipa_inline): Unset has_gate.
	(class pass_ipa_inline): Remove gate() method.

2013-12-17  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-devirt.c (get_polymorphic_call_info): Fix offset calculatoin
	in contains_type_p query.

2013-12-17  Thomas Schwinge  <thomas@codesourcery.com>

	* omp-low.c (tmp_ompfn_id_num): Remove leftover variable definition.

	* tree-pass.h (make_pass_expand_omp_ssa): Remove leftover function
	declaration.

	* omp-low.c: Remove leftover comment.

	* omp-low.c (check_combined_parallel): Reflect reality in comment.

	* doc/cfg.texi (Control Flow): Refer to passes.def instead of passes.c.
	* doc/passes.texi (Pass manager): Refer to passes.def.

	* doc/gccint.texi (Top): Fix inclusion order.

2013-12-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm-cores.def (cortex-a12): Use cortexa15 scheduling.
	* config/arm/arm.c (arm_issue_rate): Handle cortexa12.
	* config/arm/arm.md (generic_vfp): Remove cortexa12.

2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/arm/arm-cores.def (cortex-a57.cortex-a53): New.
	* doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/bpabi.h
	(BE8_LINK_SPEC): Handle -mcpu=cortex-a57.cortex-a53.

2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/arm/arm-cores.def (cortex-a57): New.
	* doc/invoke.texi: Document -mcpu=cortex-a57.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/bpabi.h (BE8_LINK_SPEC): Handle -mcpu=cortex-a57.

2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/arm/arm-cores.def (cortex-a15.cortex-a7): New.
	* doc/invoke.texi: Document -mcpu=cortex-a15.cortex-a7.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/bpabi.h
	(BE8_LINK_SPEC): Handle -mcpu=cortex-a5.cortex-a7.

2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/arm/arm-cores.def: Add new column for TUNE_IDENT.
	* config/arm/genopt.sh: Improve layout.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-opts.h (ARM_CORE): Modify macro for TUNE_IDENT.
	* config/arm/arm.c (ARM_CORE): Modify macro for TUNE_IDENT.
	(arm_option_override): When a CPU is chosen, that should also
	form the tune target.
	* config/arm/arm.h (ARM_CORE): Modify macro for TUNE_IDENT.

2013-12-17  James Greenhalgh  <james.greenhalgh@arm.com>

	* common/config/arm/arm-common.c (arm_rewrite_selected_cpu): New.
	(arm_rewrite_mcpu): Likewise.
	* config/arm/arm-protos.h (arm_rewrite_selected_cpu): New.
	* config/arm/arm.h (BIG_LITTLE_SPEC): New.
	(BIG_LITTLE_SPEC_FUNCTIONS): Likewise.
	(EXTRA_SPEC_FUNCTIONS): Include BIG_LITTLE_SPEC_FUNCTIONS.
	(ASM_CPU_SPEC): Include BIG_LITTLE_SPEC.
	* config/arm/arm.c (arm_file_start): Rewrite arm_selecetd_cpu values.

2013-12-17  Eric Botcazou  <ebotcazou@adacore.com>

	* expmed.c (lowpart_bit_field_p): Fix comment.
	(store_bit_field_using_insv): Fix formatting.
	(store_bit_field): Likewise.
	(store_fixed_bit_field): More declaration and remove return.
	(store_fixed_bit_field_1): Fix formatting.
	(extract_fixed_bit_field): Move declaration.
	(extract_fixed_bit_field_1): Simplify.

2013-12-17  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-utils.h (possible_polymorphic_call_targets): Determine
	context of the call.
	* gimple-fold.c (gimple_fold_call): Use ipa-devirt to devirtualize.

2013-12-17  Jakub Jelinek  <jakub@redhat.com>

	* expr.c (convert_modes): For SUBREG_PROMOTED_VAR_P use SUBREG_REG (x)
	instead of x as last gen_lowpart argument.

2013-12-16  Jakub Jelinek  <jakub@redhat.com>

	* predict.h (PROB_LIKELY): Fix the value.
	* internal-fn.c (ubsan_expand_si_overflow_mul_check): Add support
	for overflow checking for modes without 2xwider supported mode,
	if the mode has 2xnarrower mode.

	* internal-fn.c: Include stringpool.h and tree-ssanames.h.
	(ubsan_expand_si_overflow_addsub_check): In the generic expansion,
	try to improve generated code if one of the arguments is constant
	or get_range_info says that one of the argument is always
	negative or always non-negative.
	* tree-vrp.c (simplify_internal_call_using_ranges): New function.
	(simplify_stmt_using_ranges): Call it.

2013-12-16  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/59466
	* emit-rtl.c (change_address_1): Don't validate address for LRA.
	* recog.c (general_operand): Accept any memory for LRA.
	* lra.c (lra_set_insn_recog_data): Add an assert.

2013-12-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/driver-arm.c (arm_cpu_table): Add cortex-a12 entry.

2013-12-14  Jan Hubicka  <jh@suse.cz>
	    Markus Trippelsdorf  <octoploid@yandex.com>

	PR ipa/59265
	* ipa-profile.c (ipa_profile_generate_summary): Do not ICE when
	call is already devirtualized.

2013-12-16  Jakub Jelinek  <jakub@redhat.com>

	* Makefile.in (version.o): Restore dependencies on
	$(REVISION), $(DATESTAMP), $(BASEVER) and $(DEVPHASE).

2013-12-14  Jan Hubicka  <jh@suse.cz>

	PR ipa/59473
	* ipa-devirt.c (get_class_context): Do not ICE when type is found
	at wrong offset.

2013-12-16  Jakub Jelinek  <jakub@redhat.com>

	PR libgomp/58756
	* omp-low.c (lower_rec_input_clauses) <case OMP_CLAUSE_REDUCTION>: For
	reductions without placeholder if is_simd, but when not using
	GOMP_SIMD* internal calls, also perform the reduction operation
	on the outer var rather than simple assignment.

2013-12-16  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/58956
	PR middle-end/59470
	* gimple-walk.h (walk_stmt_load_store_addr_fn): New typedef.
	(walk_stmt_load_store_addr_ops, walk_stmt_load_store_ops): Use it
	for callback params.
	* gimple-walk.c (walk_stmt_load_store_ops): Likewise.
	(walk_stmt_load_store_addr_ops): Likewise.  Adjust all callback
	calls to supply the gimple operand containing the base tree
	as an extra argument.
	* tree-ssa-ter.c: Include gimple-walk.h.
	(find_ssaname, find_ssaname_in_store): New helper functions.
	(find_replaceable_in_bb): For calls or GIMPLE_ASM, only set
	same_root_var if USE is used somewhere in the stores of the stmt.
	* ipa-prop.c (visit_ref_for_mod_analysis): Remove name of the stmt
	argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.
	* ipa-pure-const.c (check_load, check_store, check_ipa_load,
	check_ipa_store): Likewise.
	* gimple.c (gimple_ior_addresses_taken_1, check_loadstore): Likewise.
	* ipa-split.c (test_nonssa_use, mark_nonssa_use): Likewise.
	(verify_non_ssa_vars, visit_bb): Adjust their callers.
	* cfgexpand.c (add_scope_conflicts_1): Use
	walk_stmt_load_store_addr_fn type for visit variable.
	(visit_op, visit_conflict): Remove name of the stmt
	argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.
	* tree-sra.c (asm_visit_addr): Likewise.  Remove name of the data
	argument and ATTRIBUTE_UNUSED.
	* cgraphbuild.c (mark_address, mark_load, mark_store): Add another
	unnamed tree argument.
	* gimple-ssa-isolate-paths.c (check_loadstore): Likewise.  Remove
	ATTRIBUTE_UNUSED from stmt parameter.

2013-12-16  Chung-Lin Tang  <cltang@codesourcery.com>

	* opts-common.c (integral_argument): Add support for
	hexadecimal command option integer arguments. Update comments.

2013-12-14   Jan Hubicka  <jh@suse.cz>

	PR ipa/59265
	* ipa-prop.c (ipa_analyze_call_uses): Skip already
	devirtualized calls.

2013-12-14   Jan Hubicka  <jh@suse.cz>

	PR middle-end/58477
	* ipa-prop.c (stmt_may_be_vtbl_ptr_store): Skip clobbers.

2013-12-14   Jan Hubicka  <jh@suse.cz>

	PR middle-end/58477
	* cgraphclones.c (cgraph_clone_edge): Do not resolve speculative edges.

2013-12-14   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59492
	* config/i386/i386.c (ix86_function_specific_restore): Don't
	change -fPIC.

2013-12-14  Eric Botcazou  <ebotcazou@adacore.com>

	* var-tracking.c (add_stores): Fix oversight in latest commit.

2013-12-14  Marek Polacek  <polacek@redhat.com>

	PR sanitizer/59503
	* internal-fn.c (ubsan_expand_si_overflow_addsub_check): Call
	expand_binop with correct optab depending on code.

2013-12-14  Tom de Vries  <tom@codesourcery.com>

	* calls.c (expand_call): Fix REG_PARM_STACK_SPACE comparison.

2013-12-13  DJ Delorie  <dj@redhat.com>

	* config/rl78/rl78-expand.md (one_cmplqi2): Make constant signed.

	* config/msp430/msp430.md (movqi): replace general_operand with
	msp_general_operand and nonimmediate_operand with
	msp_nonimmediate_operand to allow volatile operands.
	(movhi): Likewise.
	(movpsi): Likewise.
	(addpsi3): Likewise.
	(addhi3): Likewise.
	(addhi3_cy): Likewise.
	(addchi4_cy): Likewise.
	(xor<mode>3): Likewise.
	(ome_cmpl<mode>2): Likewise.
	(extendqihi2): Likewise.
	(zero_extendqihi2): Likewise.
	(zero_extendhipsi2): Likewise.
	(truncpsihi2): Likewise.
	(srai_1): Likewise.

2013-12-13  Vladimir Makarov  <vmakarov@redhat.com>

	* ira.h (struct ira_reg_equiv): Rename to ira_reg_equiv_s.
	* ira.c: Ditto.
	* lra-int.h (lra_init_equiv): New prototype.
	* lra-constraints.c (lra_init_equiv, update_equiv): New functions.
	(loc_equivalence_callback): Use the 3rd arg.
	(lra_constraints): Update equivalences.  Pass curr_insn to
	simplify_replace_fn_rtx.
	* lra.c (lra): Call lra_init_equiv.

2013-12-13  Kenneth Zadeck  <zadeck@naturalbridge.com>

	* genmodes.c (emit_max_int): Fixed missing parens.

2013-12-13  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/59149
	* calls.c (flags_from_decl_or_type): Fail on non decl or type.
	* trans-mem.c (diagnose_tm_1): Do not call flags_from_decl_or_type
	if no type or decl.

2013-12-13  Kenneth Zadeck  <zadeck@naturalbridge.com>

	* config/arc/arc.h (BITS_PER_UNIT): Removed.
	* config/bfin/bfin.h (BITS_PER_UNIT): Removed.
	* config/lm32/lm32.h (BITS_PER_UNIT): Removed.
	* config/m32c/m32c.h (BITS_PER_UNIT): Removed.
	* config/microblaze/microblaze.h (BITS_PER_UNIT): Removed.
	* config/picochip/picochip.h (BITS_PER_UNIT): Removed.
	* config/spu/spu.h (BITS_PER_UNIT): Removed.
	* defaults.h (BITS_PER_UNIT): Removed.
	* config/i386/i386-modes.def (MAX_BITSIZE_MODE_ANY_INT): New.
	* doc/rtl (BITS_PER_UNIT): Moved from tm.texi.
	(MAX_BITSIZE_MODE_ANY_INT): Updated.
	* doc/tm.texi (BITS_PER_UNIT): Removed.
	* doc/tm.texi.in (BITS_PER_UNIT): Removed.
	* genmodes.c (bits_per_unit, max_bitsize_mode_any_int): New.
	(create_modes): Added code to set bits_per_unit and
	max_bitsize_mode_any_int.
	(emit_max_int): Changed code generation.
	* mkconfig.sh: Added insn-modes.h.

2013-12-13  Jeff Law  <law@redhat.com>

	PR tree-optimization/45685
	* tree-ssa-phiopt.c (neg_replacement): New function.
	(tree_ssa_phiopt_worker): Call it.

2013-12-13  Yuri Rumyantsev  <ysrumyan@gmail.com>

	* config/i386/i386.c (slm_cost): Fix imul cost for HI.

2013-12-13  Bin Cheng  <bin.cheng@arm.com>

	PR tree-optimization/58296
	PR tree-optimization/41488
	* tree-scalar-evolution.c: Include necessary header files.
	(simplify_peeled_chrec): New function.
	(analyze_evolution_in_loop): New static variable.
	Call simplify_peeled_chrec.
	* tree-ssa-loop-ivopts.c (mark_bivs): Don't mark peeled IV as biv.
	(add_old_iv_candidates): Don't add candidate for peeled IV.
	* tree-affine.h (aff_combination_zero_p): New function.

2013-12-13  Nick Clifton  <nickc@redhat.com>

	* config/msp430/msp430.c (is_wakeup_func): New function.  Returns
	true if the current function has the wakeup attribute.
	(msp430_start_function): Note if the function has the wakeup
	attribute.
	(msp430_attribute_table): Add wakeup attribute.
	(msp430_expand_epilogue): Add support for wakeup functions.
	* config/msp430/msp430.md (disable_interrupts): Emit a NOP after
	the DINT instruction.
	* doc/extend.texi: Document the wakeup attribute.

2013-12-13  Kai Tietz  <kitetz@redhat.com>

	PR c++/57897
	* config/i386/i386.c (ix86_option_override_internal): Set for
	x64 target flag_unwind_tables, if flag_asynchronous_unwind_tables
	was explicit set.

2013-12-12  Jeff Law  <law@redhat.com>

	* i386.md (simple LEA peephole2): Add missing mode to zero_extend
	for zero-extended MULT simple LEA pattern.

2013-12-12  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/59470
	* lra-coalesce.c (lra_coalesce): Invalidate inheritance pseudo
	values if necessary.

2013-12-12  Jakub Jelinek  <jakub@redhat.com>

	PR libgomp/59467
	* gimplify.c (omp_check_private): Add copyprivate argument, if it
	is true, don't check omp_privatize_by_reference.
	(gimplify_scan_omp_clauses): For OMP_CLAUSE_COPYPRIVATE verify
	decl is private in outer context.  Adjust omp_check_private caller.

2013-12-11  Jeff Law  <law@redhat.com>

	PR rtl-optimization/59446
	* tree-ssa-threadupdate.c (mark_threaded_blocks): Properly
	test for crossing a loop header.

2013-12-11  Sriraman Tallam  <tmsriram@google.com>

	PR target/59390
	* config/i386/i386.c (get_builtin): New function.
	(ix86_builtin_vectorized_function): Replace all instances of
	ix86_builtins[...] with get_builtin(...).
	(ix86_builtin_reciprocal): Ditto.

2013-12-11  Balaji V. Iyer  <balaji.v.iyer@intel.com>

	* langhooks.h (lang_hooks_for_decls): Remove lang_hooks_for_cilkplus.
	(lang_hooks_for_cilkplus): Remove.
	* langhooks.c (lhd_cilk_detect_spawn): Likewise.
	(lhd_install_body_with_frame_cleanup): Likewise.
	* langhooks-def.h (LANG_HOOKS_CILKPLUS_FRAME_CLEANUP): Likewise.
	(LANG_HOOKS_CILKPLUS_DETECT_SPAWN_AND_UNWRAP): Likewise.
	(LANG_HOOKS_CILKPLUS_CILKPLUS_GIMPLIFY_SPAWN): Likewise.
	(LANG_HOOKS_CILKPLUS): Likewise.
	(LANG_HOOKS_DECLS): Remove LANG_HOOKS_CILKPLUS.
	* gimplify.c (gimplify_expr): Removed CILK_SPAWN_STMT case.
	(gimplify_modify_expr): Removed handling of _Cilk_spawn in expr.
	(gimplify_call_expr): Likewise.

2013-12-11  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	* expr.c (expand_assignment): Remove dependency on
	flag_strict_volatile_bitfields.  Always set the memory access mode.
	(expand_expr_real_1): Likewise.

2013-12-11  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR middle-end/59134
	* expmed.c (store_bit_field): Use narrow_bit_field_mem and
	store_fixed_bit_field_1 for -fstrict-volatile-bitfields.
	(store_fixed_bit_field): Split up.  Call store_fixed_bit_field_1
	to do the real work.
	(store_fixed_bit_field_1): New function.
	(store_split_bit_field): Limit the unit size to the memory mode size,
	to prevent recursion.

2013-12-11  Bernd Edlinger  <bernd.edlinger@hotmail.de>
	    Sandra Loosemore  <sandra@codesourcery.com>

	PR middle-end/23623
	PR middle-end/48784
	PR middle-end/56341
	PR middle-end/56997
	* expmed.c (strict_volatile_bitfield_p): Add bitregion_start
	and bitregion_end parameters.  Test for compliance with C++
	memory model.
	(store_bit_field): Adjust call to strict_volatile_bitfield_p.
	Add fallback logic for cases where -fstrict-volatile-bitfields
	is supposed to apply, but cannot.
	(extract_bit_field): Likewise. Use narrow_bit_field_mem and
	extract_fixed_bit_field_1 to do the extraction.
	(extract_fixed_bit_field): Revert to previous mode selection algorithm.
	Call extract_fixed_bit_field_1 to do the real work.
	(extract_fixed_bit_field_1): New function.

2013-12-11  Sandra Loosemore  <sandra@codesourcery.com>

	PR middle-end/23623
	PR middle-end/48784
	PR middle-end/56341
	PR middle-end/56997
	* expmed.c (strict_volatile_bitfield_p): New function.
	(store_bit_field_1): Don't special-case strict volatile
	bitfields here.
	(store_bit_field): Handle strict volatile bitfields here instead.
	(store_fixed_bit_field): Don't special-case strict volatile
	bitfields here.
	(extract_bit_field_1): Don't special-case strict volatile
	bitfields here.
	(extract_bit_field): Handle strict volatile bitfields here instead.
	(extract_fixed_bit_field): Don't special-case strict volatile
	bitfields here.  Simplify surrounding code to resemble that in
	store_fixed_bit_field.
	* doc/invoke.texi (Code Gen Options): Update
	-fstrict-volatile-bitfields description.

2013-12-11  Kugan Vivekanandarajah  <kuganv@linaro.org>

	* configure.ac: Add check for aarch64 assembler -mabi support.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/aarch64/aarch64-elf.h (ASM_MABI_SPEC): New define.
	(ASM_SPEC): Update to substitute -mabi with ASM_MABI_SPEC.
	* config/aarch64/aarch64.h (aarch64_override_options): Issue error
	if assembler does not support -mabi and option ilp32 is selected.
	* doc/install.texi: Added note that building gcc 4.9 and after
	with pre 2.24 binutils will not support -mabi=ilp32.

2013-12-11  Marek Polacek  <polacek@redhat.com>

	PR sanitizer/59399
	* expr.c (expand_expr_real_1): Remove assert dealing with
	internal calls and turn that into a condition instead.

2013-12-11  Yvan Roux  <yvan.roux@linaro.org>

	* config/arm/arm.opt (mlra): Enable LRA by default.

2013-12-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59417
	* tree-ssa-copy.c (fini_copy_prop): If copy_of[i].value is defined
	in a different bb rhan var, only duplicate points-to info and
	not alignment info and don't duplicate range info.
	* tree-ssa-loop-niter.c (determine_value_range): Instead of
	assertion failure handle inconsistencies in range info by only
	using var's range info and not PHI result range infos.

	PR tree-optimization/59386
	* tree-inline.c (remap_gimple_stmt): If not id->do_not_unshare,
	unshare_expr (id->retval) before passing it to gimple_build_assign.

2013-12-11  Bin Cheng  <bin.cheng@arm.com>

	Reverted:
	2013-12-10  Bin Cheng  <bin.cheng@arm.com>
	PR tree-optimization/41488
	* tree-ssa-loop-ivopts.c (add_old_iv_candidates): Don't add cand
	for PEELED_CHREC kind IV.
	* tree-scalar-evolution.c: Include necessary header files.
	(peeled_chrec_map, simplify_peeled_chrec): New.
	(analyze_evolution_in_loop): New static variable.
	Call simplify_peeled_chrec.
	(scev_initialize): Initialize peeled_chrec_map.
	(scev_reset, scev_finalize): Reset and release peeled_chrec_map.

2013-12-10   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59458
	* config/i386/i386.md (*movsf_internal): Set mode to SI for
	alternative 13.

2013-12-10  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/58295
	* simplify-rtx.c (simplify_truncation): Restrict the distribution for
	WORD_REGISTER_OPERATIONS targets.

2013-12-10  Richard Sandiford  <rdsandiford@googlemail.com>

	* genrecog.c (validate_pattern): Treat all messages except missing
	modes as errors.
	* config/epiphany/epiphany.md: Remove constraints from
	define_peephole2s.
	* config/h8300/h8300.md: Remove constraints from define_splits.
	* config/msp430/msp430.md: Likewise.
	* config/mcore/mcore.md (movdi_i, movsf_i, movdf_k): Use
	nonimmediate_operand rather than general_operand for operand 0.
	* config/moxie/moxie.md (*movsi, *movqi, *movhi): Likewise.
	* config/pdp11/predicates.md (float_operand, float_nonimm_operand):
	Use match_operator rather than match_test to invoke general_operand.
	* config/v850/v850.md (*movqi_internal, *movhi_internal)
	(*movsi_internal_v850e, *movsi_internal, *movsf_internal): Likewise.

2013-12-10  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/tilegx/tilegx.md (insn_ld_add<bitsuffix>): Use
	register_operand rather than pointer_operand.  Add modes to the
	operands.
	(insn_ldna_add<bitsuffix>): Likewise.
	(insn_ld<I124MODE:n><s>_add<I48MODE:bitsuffix>): Likewise.
	(insn_ldnt_add<bitsuffix>): Likewise.
	(insn_ldnt<I124MODE:n><s>_add<I48MODE:bitsuffix>): Likewise.
	(insn_ld_add_L2<bitsuffix>): Likewise.
	(insn_ldna_add_L2<bitsuffix>): Likewise.
	(insn_ld<I124MODE:n><s>_add_L2<I48MODE:bitsuffix>): Likewise.
	(insn_ldnt_add_L2<bitsuffix>): Likewise.
	(insn_ldnt<I124MODE:n><s>_add_L2<I48MODE:bitsuffix>): Likewise.
	(insn_ld_add_miss<bitsuffix>): Likewise.
	(insn_ldna_add_miss<bitsuffix>): Likewise.
	(insn_ld<I124MODE:n><s>_add_miss<I48MODE:bitsuffix>): Likewise.
	(insn_ldnt_add_miss<bitsuffix>): Likewise.
	(insn_ldnt<I124MODE:n><s>_add_miss<I48MODE:bitsuffix>): Likewise.
	(insn_st_add<bitsuffix>): Likewise.
	(insn_st<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise.
	(*insn_st<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise.
	(insn_stnt_add<bitsuffix>): Likewise.
	(insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise.
	(*insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise.
	(vec_pack_<pack_optab>_v4hi): Use register_operand rather than
	reg_or_0_operand for operand 0.
	(insn_v2<pack_insn>): Likewise.
	(vec_pack_hipart_v4hi): Likewise.
	(insn_v2packh): Likewise.
	(vec_pack_ssat_v2si): Likewise.
	(insn_v4packsc): Likewise.

2013-12-10  H.J. Lu  <hongjiu.lu@intel.com>

	* basic-block.h (gcov_working_set_t): Put back typedef.
	* gcov-io.h (gcov_bucket_type): Likewise.
	(gcov_working_set_info, gcov_working_set_t): Likewise.

2013-12-10  Oleg Endo  <olegendo@gcc.gnu.org>

	* cgraph.h (cgraph_node_set_iterator, varpool_node_set_iterator):
	Remove typedef.
	(cgraph_inline_failed_enum, cgraph_inline_failed_t): Remove typedef and
	rename to cgraph_inline_failed_t.
	* tree-ssa-alias.h (ao_ref_s, ao_ref): Remove typedef and rename
	to ao_ref.
	* reload.h (reg_equivs_s, reg_equivs_t): Remove typedef and rename
	to reg_equivs_t.
	* conditions.h (CC_STATUS): Remove typedef.
	* bitmap.h (bitmap_obstack): Remove typedef.
	(bitmap_element_def, bitmap_element): Remove typedef and rename to
	bitmap_element.
	(bitmap_head_def, bitmap_head): Remove typedef and rename to
	bitmap_head.
	(bitmap_iterator): Remove typedef.
	* target.h (cumulative_args_t, print_switch_type,
	secondary_reload_info): Remove typedef.
	* dwarf2out.h (dw_cfi_oprnd_struct, dw_cfi_oprnd): Remove
	dw_cfi_oprnd_struct alias.
	(dw_cfi_struct, dw_cfi_node): Remove typedef and rename to dw_cfi_node.
	(dw_fde_struct, dw_fde_node): Remove typedef and rename to dw_fde_node.
	(cfa_loc, dw_cfa_location): Remove typedef and rename to
	dw_cfa_location.
	(dw_vec_struct, dw_vec_const): Remove typedef and rename to
	dw_vec_const.
	(dw_val_struct, dw_val_node): Remove typedef and rename to dw_val_node.
	(dw_loc_descr_struct, dw_loc_descr_node): Remove typedef and rename to
	dw_loc_descr_node.
	* params.h (param_info, compiler_param): Remove typedef.
	* opts.h (cl_deferred_param): Remove typedef.
	* sreal.h (sreal): Remove typedef.
	* ddg.h (dep_type, dep_data_type): Remove typedef.
	* graphite-clast-to-gimple.h (cloog_prog_clast, bb_pbb_def): Remove
	typedef.
	* lto-streamer.h (lto_decl_stream_e_t, lto_encoder_entry,
	lto_symtab_encoder_iterator, res_pair): Remove typedef.
	* tree-affine.h (affine_tree_combination, aff_tree): Remove typedef
	and rename to aff_tree.
	* sched-int.h (region): Remove typedef.
	* diagnostic.h (diagnostic_info,
	diagnostic_classification_change_t): Remove typedef.
	* tree-ssa-loop.h (affine_iv_d): Remove typedef and rename to
	affine_iv.
	* sbitmap.h (sbitmap_iterator): Remove typedef.
	* ssa-iterators.h (immediate_use_iterator_d, imm_use_iterator):
	Remove typedef and rename to imm_use_iterator.
	(ssa_operand_iterator_d, ssa_op_iter): Remove typedef and rename to
	ssa_op_iter.
	* ggc-internal.h (ggc_statistics): Remove typedef.
	* cselib.h (cselib_val_struct, cselib_val): Remove typedef and
	rename to cselib_val.
	* tree-core.h (alias_pair): Remove typedef.
	(constructor_elt_d, constructor_elt): Remove typedef and rename to
	constructor_elt.
	(ssa_use_operand_d, ssa_use_operand_t): Remove typedef and rename to
	ssa_use_operand_t.
	* graphite-sese-to-poly.h (base_alias_pair): Remove typedef.
	* tree-data-ref.h (conflict_function): Remove typedef.
	* tree-inline.h (copy_body_data): Remove typedef.
	* ipa-inline.h (condition, size_time_entry, inline_param_summary_t,
	edge_growth_cache_entry): Remove typedef.
	* regrename.h (operand_rr_info, insn_rr_info): Remove typedef.
	* gimple-iterator.h (gimple_stmt_iterator_d, gimple_stmt_iterator):
	Remove typedef and rename to gimple_stmt_iterator.
	* basic-block.h (ce_if_block, ce_if_block_t): Remove typedef and
	rename to ce_if_block.
	(edge_iterator): Remove typedef.
	* ipa-prop.h (ipa_agg_jf_item, ipa_agg_jf_item_t): Remove typedef
	and rename to ipa_agg_jf_item.
	(ipa_agg_jump_function_t, ipa_param_descriptor_t, ipa_node_params_t,
	ipa_parm_adjustment_t): Remove typedef.
	(ipa_jump_func, ipa_jump_func_t): Remove typedef and rename to
	ipa_jump_func.
	(ipa_edge_args, ipa_edge_args_t): Remove typedef and rename to
	ipa_edge_args.
	* gcov-io.h (gcov_bucket_type): Remove typedef.
	(gcov_working_set_info, gcov_working_set_t): Remove typedef and rename
	to gcov_working_set_t.
	* ira-int.h (minmax_set_iterator, ira_allocno_iterator,
	ira_object_iterator, ira_allocno_object_iterator, ira_pref_iterator,
	ira_copy_iterator, ira_object_conflict_iterator): Remove typedef.
	* tree-iterator.h (tree_stmt_iterator): Remove typedef.
	* rtl.h (addr_diff_vec_flags, mem_attrs, reg_attrs,
	replace_label_data): Remove typedef.
	(rtunion_def, rtunion): Remove typedef and rename to rtunion.
	* hard-reg-set.h (hard_reg_set_iterator): Remove typedef.
	* sel-sched-ir.h (_list_iterator, sel_global_bb_info_def,
	sel_region_bb_info_def, succ_iterator): Remove typedef.
	(deps_where_def, deps_where_t): Remove typedef and rename to
	deps_where_t.
	* coretypes.h: Adapt forward declarations.
	* tree-scalar-evolution.h: Likewise.
	* tree-ssa-address.h: Likewise.
	* tree-ssa-operands.h: Likewise.
	* function.h: Likewise.
	* config/frv/frv-protos.h: Likewise.
	* targhooks.h: Likewise.
	* basic_block.h: Likewise.
	* rtl.def: Adapt documentation.
	* doc/tm.texi: Likewise.
	* ipa-cp.c: Adapt uses.
	* bitmap.c: Likewise.
	* dwarf2out.c: Likewise.
	* target.def: Likewise.
	* ipa-inline-analysis.c: Likewise.
	* dwarf2cfi.c: Likewise.
	* tree-ssa-loop-ivopts.c: Likewise.
	* lto-cgraph.c: Likewise.
	* config/frv/frv.c: Likewise.
	* ifcvt.c: Likewise.
	* ipa-prop.c: Likewise.

2013-12-10  Kai Tietz  <ktietz@redhat.com>

	PR target/56807
	* config/i386/i386.c (ix86_expand_prologue): Address saved
	registers stack-relative, not via frame-pointer.

2013-12-10  Richard Biener  <rguenther@suse.de>

	PR middle-end/38474
	* tree-ssa-structalias.c (solution_set_expand): Expand into
	a different possibly cached bitmap and return the result.
	(set_union_with_increment): Pass in a shared expanded bitmap
	and adjust.
	(do_sd_constraint): Likewise.
	(do_ds_constraint): Likewise.
	(do_complex_constraint): Likewise.
	(solve_graph): Manage the shared expanded bitmap.

2013-12-10  Jakub Jelinek  <jakub@redhat.com>

	* tree-vectorizer.h (struct _loop_vec_info): Add scalar_loop field.
	(LOOP_VINFO_SCALAR_LOOP): Define.
	(slpeel_tree_duplicate_loop_to_edge_cfg): Add scalar_loop argument.
	* config/i386/sse.md (maskload<mode>, maskstore<mode>): New expanders.
	* tree-data-ref.c (get_references_in_stmt): Handle MASK_LOAD and
	MASK_STORE.
	* internal-fn.def (LOOP_VECTORIZED, MASK_LOAD, MASK_STORE): New
	internal fns.
	* tree-if-conv.c: Include expr.h, optabs.h, tree-ssa-loop-ivopts.h and
	tree-ssa-address.h.
	(release_bb_predicate): New function.
	(free_bb_predicate): Use it.
	(reset_bb_predicate): Likewise.  Don't unallocate bb->aux
	just to immediately allocate it again.
	(add_to_predicate_list): Add loop argument.  If basic blocks that
	dominate loop->latch don't insert any predicate.
	(add_to_dst_predicate_list): Adjust caller.
	(if_convertible_phi_p): Add any_mask_load_store argument, if true,
	handle it like flag_tree_loop_if_convert_stores.
	(insert_gimplified_predicates): Likewise.
	(ifcvt_can_use_mask_load_store): New function.
	(if_convertible_gimple_assign_stmt_p): Add any_mask_load_store
	argument, check if some conditional loads or stores can't be
	converted into MASK_LOAD or MASK_STORE.
	(if_convertible_stmt_p): Add any_mask_load_store argument,
	pass it down to if_convertible_gimple_assign_stmt_p.
	(predicate_bbs): Don't return bool, only check if the last stmt
	of a basic block is GIMPLE_COND and handle that.  Adjust
	add_to_predicate_list caller.
	(if_convertible_loop_p_1): Only call predicate_bbs if
	flag_tree_loop_if_convert_stores and free_bb_predicate in that case
	afterwards, check gimple_code of stmts here.  Replace is_predicated
	check with dominance check.  Add any_mask_load_store argument,
	pass it down to if_convertible_stmt_p and if_convertible_phi_p,
	call if_convertible_phi_p only after all if_convertible_stmt_p calls.
	(if_convertible_loop_p): Add any_mask_load_store argument,
	pass it down to if_convertible_loop_p_1.
	(predicate_mem_writes): Emit MASK_LOAD and/or MASK_STORE calls.
	(combine_blocks): Add any_mask_load_store argument, pass
	it down to insert_gimplified_predicates and call predicate_mem_writes
	if it is set.  Call predicate_bbs.
	(version_loop_for_if_conversion): New function.
	(tree_if_conversion): Adjust if_convertible_loop_p and combine_blocks
	calls.  Return todo flags instead of bool, call
	version_loop_for_if_conversion if if-conversion should be just
	for the vectorized loops and nothing else.
	(main_tree_if_conversion): Adjust caller.  Don't call
	tree_if_conversion for dont_vectorize loops if if-conversion
	isn't explicitly enabled.
	* tree-vect-data-refs.c (vect_check_gather): Handle
	MASK_LOAD/MASK_STORE.
	(vect_analyze_data_refs, vect_supportable_dr_alignment): Likewise.
	* gimple.h (gimple_expr_type): Handle MASK_STORE.
	* internal-fn.c (expand_LOOP_VECTORIZED, expand_MASK_LOAD,
	expand_MASK_STORE): New functions.
	* tree-vectorizer.c: Include tree-cfg.h and gimple-fold.h.
	(vect_loop_vectorized_call, fold_loop_vectorized_call): New functions.
	(vectorize_loops): Don't try to vectorize loops with
	loop->dont_vectorize set.  Set LOOP_VINFO_SCALAR_LOOP for if-converted
	loops, fold LOOP_VECTORIZED internal call depending on if loop
	has been vectorized or not.
	* tree-vect-loop-manip.c (slpeel_duplicate_current_defs_from_edges):
	New function.
	(slpeel_tree_duplicate_loop_to_edge_cfg): Add scalar_loop argument.
	If non-NULL, copy basic blocks from scalar_loop instead of loop, but
	still to loop's entry or exit edge.
	(slpeel_tree_peel_loop_to_edge): Add scalar_loop argument, pass it
	down to slpeel_tree_duplicate_loop_to_edge_cfg.
	(vect_do_peeling_for_loop_bound, vect_do_peeling_for_loop_alignment):
	Adjust callers.
	(vect_loop_versioning): If LOOP_VINFO_SCALAR_LOOP, perform loop
	versioning from that loop instead of LOOP_VINFO_LOOP, move it to the
	right place in the CFG afterwards.
	* tree-vect-loop.c (vect_determine_vectorization_factor): Handle
	MASK_STORE.
	* cfgloop.h (struct loop): Add dont_vectorize field.
	* tree-loop-distribution.c (copy_loop_before): Adjust
	slpeel_tree_duplicate_loop_to_edge_cfg caller.
	* optabs.def (maskload_optab, maskstore_optab): New optabs.
	* passes.def: Add a note that pass_vectorize must immediately follow
	pass_if_conversion.
	* tree-predcom.c (split_data_refs_to_components): Give up if
	DR_STMT is a call.
	* tree-vect-stmts.c (vect_mark_relevant): Don't crash if lhs is NULL.
	(exist_non_indexing_operands_for_use_p): Handle MASK_LOAD
	and MASK_STORE.
	(vectorizable_mask_load_store): New function.
	(vectorizable_call): Call it for MASK_LOAD or MASK_STORE.
	(vect_transform_stmt): Handle MASK_STORE.
	* tree-ssa-phiopt.c (cond_if_else_store_replacement): Ignore
	DR_STMT where lhs is NULL.
	* optabs.h (can_vec_perm_p): Fix up comment typo.
	(can_vec_mask_load_store_p): New prototype.
	* optabs.c (can_vec_mask_load_store_p): New function.

2013-12-10  Eric Botcazou  <ebotcazou@adacore.com>

	* expr.c (expand_expr_real_1) <normal_inner_ref>: Always return 0 for
	the extraction of a bit-field of null size.

2013-12-10  Marek Polacek  <polacek@redhat.com>

	PR sanitizer/59437
	* vtable-verify.c (var_is_used_for_virtual_call_p): Check the
	return value of gimple_call_fn.  Use is_gimple_call/is_gimple_assign
	instead of gimple_code.

2013-12-10  Maxim Kuvyrkov  <maxim@kugelworks.com>

	* config.gcc (mips*-mti-linux*, mips64*-*-linux*):
	Add android definitions.
	(s390x-*-linux*): Use linux-protos.h.

2013-12-10  Bin Cheng  <bin.cheng@arm.com>

	PR tree-optimization/41488
	* tree-ssa-loop-ivopts.c (add_old_iv_candidates): Don't add cand
	for PEELED_CHREC kind IV.
	* tree-scalar-evolution.c: Include necessary header files.
	(peeled_chrec_map, simplify_peeled_chrec): New.
	(analyze_evolution_in_loop): New static variable.
	Call simplify_peeled_chrec.
	(scev_initialize): Initialize peeled_chrec_map.
	(scev_reset, scev_finalize): Reset and release peeled_chrec_map.

2013-12-09  Andrew Pinski  <apinski@cavium.com>

	* config/aarch64/t-aarch64 (MULTILIB_OPTIONS): Fix definition so
	that options are conflicting ones.

2013-12-09  Eric Botcazou  <ebotcazou@adacore.com>

	* optabs.c (gen_int_libfunc): Do not compare modes directly.

2013-12-09  David Malcolm  <dmalcolm@redhat.com>

	* basic-block.h (FOR_ALL_BB): Eliminate macro.

	* cfg.c (alloc_aux_for_blocks, clear_aux_for_blocks): Replace
	uses of FOR_ALL_BB with FOR_ALL_BB_FN, making uses of cfun explicit.

	* cfganal.c (inverted_post_order_compute): Likewise.
	* cfgcleanup.c (try_optimize_cfg): Likewise.
	* cfgexpand.c (add_scope_conflicts): Likewise.
	* cfghooks.c (dump_flow_info, account_profile_record): Likewise.
	* cfgrtl.c (relink_block_chain): Likewise.
	* dce.c (mark_artificial_uses): Likewise.
	* df-core.c (df_set_blocks, df_compute_cfg_image, df_dump): Likewise.
	* df-problems.c (df_lr_verify_solution_start,
	df_lr_verify_solution_end, df_lr_verify_transfer_functions,
	df_live_verify_solution_start, df_live_verify_solution_end,
	df_live_set_all_dirty, df_live_verify_transfer_functions,
	df_md_local_comput): Likewise.
	* df-scan.c (df_scan_free_internal, df_scan_alloc)
	df_reorganize_refs_by_insn, df_scan_verify): Likewise.
	* dominance.c (compute_dom_fast_query, calculate_dominance_info,
	free_dominance_info): Likewise.
	* dse.c (dse_step1, dse_step3, dse_step4, dse_step6): Likewise.
	* graph.c (draw_cfg_edges): Likewise.
	* graphite-scop-detection.c (print_graphite_scop_statistics,
	dot_all_scops_1): Likewise.
	* graphite.c (print_global_statistics,
	print_graphite_scop_statistics): Likewise.
	* ira.c (do_reload): Likewise.
	* loop-init.c (loop_optimizer_finalize): Likewise.
	* lto-streamer-in.c (input_function): Likewise.
	* lto-streamer-out.c (output_function): Likewise.
	* mcf.c (adjust_cfg_counts): Likewise.
	* predict.c (estimate_loops): Likewise.
	* sched-rgn.c (haifa_find_rgns): Likewise.
	* tree-cfg.c (split_critical_edges): Likewise.
	* tree-dfa.c (renumber_gimple_stmt_uids): Likewise.
	* tree-loop-distribution.c (tree_loop_distribution): Likewise.
	* tree-ssa-pre.c (compute_antic, insert, init_pre): Likewise.
	* tree-ssa-propagate.c (ssa_prop_init): Likewise.
	* var-tracking.c (vt_initialize, vt_finalize): Likewise.
	* vtable-verify.c (vtable_verify_main): Likewise.
	* web.c (web_main): Likewise.

2013-12-09  David Malcolm  <dmalcolm@redhat.com>

	* basic-block.h (FOR_EACH_BB_REVERSE): Eliminate macro.

	* cfghooks.c (verify_flow_info): Replace uses of FOR_EACH_BB_REVERSE
	with FOR_EACH_BB_REVERSE_FN, making uses of cfun explicit.
	* cfgrtl.c (print_rtl_with_bb, rtl_verify_edges,
	rtl_verify_bb_insns, rtl_verify_bb_pointers,
	rtl_verify_bb_insn_chain, rtl_verify_fallthru): Likewise.
	* config/ia64/ia64.c (emit_predicate_relation_info): Likewise.
	* config/sh/sh.c (sh_md_init_global): Likewise.
	* config/sh/sh_optimize_sett_clrt.cc
	(sh_optimize_sett_clrt::execute): Likewise.
	* dce.c (reset_unmarked_insns_debug_uses, delete_unmarked_insns):
	Likewise.
	* dominance.c (calc_dfs_tree): Likewise.
	* final.c (final): Likewise.
	* function.c (thread_prologue_and_epilogue_insns): Likewise.
	* gcse.c (compute_code_hoist_vbeinout): Likewise.
	* ira.c (update_equiv_regs, build_insn_chain): Likewise.
	* lcm.c (compute_antinout_edge): Likewise.
	* mode-switching.c (optimize_mode_switching): Likewise.
	* postreload.c (reload_combine): Likewise.
	* recog.c (split_all_insns, peephole2_optimize): Likewise.
	* tree-ssa-live.c (live_worklist): Likewise.

2013-12-09  David Malcolm  <dmalcolm@redhat.com>

	* basic-block.h (FOR_EACH_BB): Eliminate macro.

	* asan.c (transform_statements, execute_sanopt): Eliminate
	use of FOR_EACH_BB in favor of FOR_EACH_BB_FN, to make use of cfun
	explicit.
	* auto-inc-dec.c (rest_of_handle_auto_inc_dec): Likewise.
	* bb-reorder.c (find_rarely_executed_basic_blocks_and_crossing_edges,
	set_edge_can_fallthru_flag, fix_up_fall_thru_edges,
	fix_crossing_unconditional_branches, add_reg_crossing_jump_notes,
	insert_section_boundary_note, rest_of_handle_reorder_blocks,
	duplicate_computed_gotos): Likewise.
	* cfg.c (clear_edges, compact_blocks, brief_dump_cfg): Likewise.
	* cfganal.c (find_unreachable_blocks, add_noreturn_fake_exit_edges,
	compute_dominance_frontiers_1, single_pred_before_succ_order): Likewise.
	* cfgbuild.c (find_many_sub_basic_blocks): Likewise.
	* cfgcleanup.c (try_optimize_cfg, delete_dead_jumptables): Likewise.
	* cfgexpand.c (add_scope_conflicts, discover_nonconstant_array_refs):
	Likewise.
	* cfgloop.c (flow_loops_cfg_dump, get_loop_body, record_loop_exits,
	verify_loop_structure): Likewise.
	* cfgloopanal.c (mark_loop_exit_edges): Likewise.
	* cfgrtl.c (compute_bb_for_insn, find_partition_fixes,
	verify_h